L6747CTR STMicroelectronics

L6747C High current MOSFET driver Features Dual MOSFET driver for synchronous rectified converters High driving current for fast external MOSFET switching High frequency operation VFDFPN8 3x3 mm Enable pin Adaptive dead-time management regulator solutions for modern high-current CPUs and for DC-DC conversion in general. Flexible gate-drive: 5 V to 12 V compatible The L6747C embeds high-current drivers for both High-impedance (HiZ) management for output high-side and low-side MOSFETS. The device stage shutdown accepts a flexible power supply of 5 V to 12 V. Preliminary overvoltage (OV) protection This allows optimization of the high-side and low- VFDFPN8 3x3 mm package side gate-drive voltage to maximize system efficiency. Applications Anti shoot-through management prevents the high-side and low-side MOSFETs from High current VRM / VRD for desktop / server / conducting simultaneously and, combined with workstation CPUs adaptive dead-time control, minimizes the LS High current and high efficiency DC-DC body diode conduction time. converters The L6747C features preliminary OV protection to protect the load from dangerous overvoltage due Description to MOSFET failures at startup. The L6747C is a flexible, high-frequency dual- The driver is available in a VFDFPN8 3x3 mm driver specifically designed to drive N-channel package. MOSFETs connected in synchronous-rectified buck topology. Combined with ST PWM controllers, the driver allows the implementation of complete voltage Table 1. Device summary Order codes Package Packing L6747C VFDFPN8 Tube L6747CTR VFDFPN8 Tape and reel April 2010 Doc ID 17127 Rev 1 1/15 www.st.com 15Contents L6747C Contents 1 Typical application circuit and block diagram 3 2 Pin information and thermal data 4 2.1 Pin information 4 2.2 Thermal data . 5 3 Electrical specifications 6 3.1 Absolute maximum ratings . 6 3.2 Electrical characteristics . 6 4 Device description and operation 8 4.1 High-impedance (HiZ) management . 9 4.2 Preliminary OV protection . 9 4.3 BOOT capacitance design . 9 4.4 Power dissipation . 10 4.5 Layout guidelines . 11 5 Package mechanical data 13 6 Revision history . 14 2/15 Doc ID 17127 Rev 1