LNBH23LQTR STMicroelectronics

LNBH23L LNB supply and control IC with step-up and IC interface Features Complete interface between LNB and IC bus Built-in DC-DC converter for single 12 V supply operation and high efficiency (typ. 93% 0.5 A) Selectable output current limit by external resistor Compliant with main satellite receivers output QFN32 (5 x 5 mm) voltage specification (Exposed pad) Auxiliary modulation input (EXTM pin) facilitates DiSEqC 1.X encoding Accurate built-in 22 kHz tone generator suits widely accepted standards Description Low-drop post regulator and high efficiency Intended for analog and digital satellite receivers, step-up PWM with integrated power NMOS the LNBH23L is a monolithic voltage regulator allow low power losses and interface IC, assembled in QFN32 5 x 5 Overload and over-temperature internal specifically designed to provide the 13 / 18 V protections with IC diagnostic bits power supply and the 22 kHz tone signalling to the LNB down-converter in the antenna dish or to LNB short circuit dynamic protection the multi-switch box. In this application field, it 4 kV ESD tolerant on output power pins offers a complete solution with extremely low component count, low power dissipation together Applications with simple design and IC standard interfacing. STB satellite receivers TV satellite receivers PC card satellite receivers Table 1. Device summary Order code Package Packaging LNBH23LQTR QFN32 (5 x 5 mm) Exposed pad Tape and reel November 2010 Doc ID 15335 Rev 4 1/25 www.st.com 25 Contents LNBH23L Contents 1 Block diagram 4 2 Application information 5 2.1 DiSEqC data encoding 5 2.2 DiSEqC 1.X implementation by EXTM pin . 5 2.3 DiSEqC 1.X implementation with VOTX and EXTM pin connection 5 2.4 PDC optional circuit for DiSEQC 1.X applications using VOTX signal on to EXTM pin 6 2.5 IC interface 6 2.6 Output voltage selection . 6 2.7 Diagnostic and protection functions 6 2.8 Over-current and short circuit protection and diagnostic 6 2.9 Thermal protection and diagnostic . 7 2.10 Output current limit selection . 7 3 Pin configuration . 8 4 Maximum ratings . 10 5 Typical application circuit . 11 6 IC bus interface . 14 6.1 Data validity . 14 6.2 Start and stop condition 14 6.3 Byte format 14 6.4 Acknowledge 14 6.5 Transmission without acknowledge . 14 7 LNBH23L software description . 16 7.1 Interface protocol . 16 7.2 System register (SR, 1 byte) 16 7.3 Transmitted data (IC bus write mode) . 16 7.4 Diagnostic received data (IC read mode) 17 2/25 Doc ID 15335 Rev 4