M24128-DRMN3TP/K STMicroelectronics

M24128-A125 Automotive 128-Kbit serial IC bus EEPROM with 1 MHz clock Datasheet - production data Features 2 Compatible with all I C bus modes 1 MHz 400 kHz 100 kHz Memory array TSSOP8 (DW) 128 Kbit (16 Kbyte) of EEPROM 169 mil width Page size: 64 byte Additional Write lockable page (Identification page) Extended temperature and voltage ranges -40 C to 125 C 1.7 V to 5.5 V Schmitt trigger inputs for noise filtering. Short Write cycle time SO8 (MN) 150 mil width Byte Write within 4 ms Page Write within 4 ms Write cycle endurance 4 million Write cycles at 25 C 1.2 million Write cycles at 85 C 600 k Write cycles at 125 C Data retention WFDFPN8 (MF) 2 x 3 mm 50 years at 125 C 100 years at 25 C ESD protection (Human Body Model) 4000 V Packages RoHS compliant and halogen-free (ECOPACK2 ) February 2016 DocID023817 Rev 5 1/41 This is information on a product in full production. www.st.comContents M24128-A125 Contents 1 Description . 6 2 Signal description . 8 2.1 Serial Clock (SCL) . 8 2.2 Serial Data (SDA) 8 2.3 Chip Enable (E2, E1, E0) 8 2.4 Write Control (WC) . 8 2.5 V (ground) . 9 SS 2.6 Supply voltage (V ) . 9 CC 3 Device operation . 10 3.1 Start condition .11 3.2 Stop condition .11 3.3 Data input 11 3.4 Acknowledge bit (ACK) .11 3.5 Device addressing 12 3.6 Identification page 14 4 Instructions . 15 4.1 Write operations 15 4.1.1 Byte Write . 16 4.1.2 Page Write . 17 4.1.3 Write Identification Page 18 4.1.4 Lock Identification Page . 18 4.1.5 Minimizing Write delays by polling on ACK 18 4.2 Read operations 20 4.2.1 Random Address Read . 20 4.2.2 Current Address Read 21 4.2.3 Sequential Read 21 4.2.4 Read Identification Page 21 4.2.5 Read the lock status . 21 4.2.6 Acknowledge in Read mode . 22 2/41 DocID023817 Rev 5