M25P05-A 512 Kbit, Low Voltage, Serial Flash Memory With 50MHz SPI Bus Interface FEATURES SUMMARY 512 Kbit of Flash Memory Figure 1. Packages Page Program (up to 256 Bytes) in 1.4ms (typical) Sector Erase (256 Kbit) in 1s (typical) Bulk Erase (512 Kbit) in 2.5s (typical) 2.7 to 3.6V Single Supply Voltage 8 SPI Bus Compatible Serial Interface 50MHz Clock Rate (maximum) Deep Power-down Mode 1 A (typical) 1 Electronic Signature SO8 (MN) JEDEC Standard two-Byte Signature 150 mil width (2010h) RES Instruction, One-Byte, Signature (05h), for backward compatibility More than 100,000 Erase/Program Cycles per Sector More than 20 Years Data Retention VDFPN8 (MP) (MLP8) TSSOP8 (DW) August 2005 1/42M25P05-A TABLE OF CONTENTS FEATURES SUMMARY . 1 SIGNAL DESCRIPTION . 5 Serial Data Output (Q) 5 Serial Data Input (D) . 5 Serial Clock (C) . 5 Chip Select (S) . 5 Hold (HOLD) . 5 Write Protect (W) 5 SPI MODES . 6 OPERATING FEATURES 7 Page Programming . 7 Sector Erase and Bulk Erase . 7 Polling During a Write, Program or Erase Cycle . 7 Active Power, Standby Power and Deep Power-Down Modes 7 Status Register 7 WIP bit 7 WEL bit . 7 BP1, BP0 bits 7 SRWD bit 7 Protection Modes 8 Hold Condition . 9 MEMORY ORGANIZATION . 10 INSTRUCTIONS 11 Write Enable (WREN) 12 Write Disable (WRDI) . 13 Read Identification (RDID) 14 Read Status Register (RDSR) 15 WIP bit . 15 WEL bit 15 BP1, BP0 bits . 15 SRWD bit . 15 Write Status Register (WRSR) . 16 Read Data Bytes (READ) 18 Read Data Bytes at Higher Speed (FAST READ) 19 Page Program (PP) 20 Sector Erase (SE) . 21 Bulk Erase (BE) . 23 Deep Power-down (DP) . 24 Release from Deep Power-down and Read Electronic Signature (RES) . 25 2/42