M25P10-AVMN6TP STMicroelectronics

M25P10-A 1 Mbit, low voltage, Serial Flash memory with 50MHz SPI bus interface Feature summary 1 Mbit of Flash Memory Page Program (up to 256 Bytes) in 1.4ms 8 (typical) Sector Erase (256 Kbit) in 0.8s (typical) 1 Bulk Erase (1 Mbit) in 2.5s (typical) SO8 (MN) 150 mil width 2.7 to 3.6V Single Supply Voltage SPI Bus Compatible Serial Interface 50MHz Clock Rate (maximum) Deep Power-down Mode 1 A (typical) Electronic Signatures JEDEC Standard two-Byte Signature VFQFPN8 (MP) (2011h) (MLP8) RES Instruction, One-Byte, Signature (10h), for backward compatibility More than 20 Years Data Retention Packages ECOPACK (RoHS compliant) June 2006 Rev 7 1/49 www.st.com 1Contents M25P10-A Contents 1 Summary description 6 2 Signal description . 8 2.1 Serial Data Output (Q) 8 2.2 Serial Data Input (D) . 8 2.3 Serial Clock (C) . 8 2.4 Chip Select (S) 8 2.5 Hold (HOLD) 8 2.6 Write Protect (W) 8 3 SPI modes . 9 4 Operating features . 11 4.1 Page Programming 11 4.2 Sector Erase and Bulk Erase 11 4.3 Polling During a Write, Program or Erase Cycle . 11 4.4 Active Power, Standby Power and Deep Power-Down Modes . 11 4.5 Status Register . 12 4.6 Protection Modes . 12 4.7 Hold Condition . 13 5 Memory organization . 14 6 Instructions . 15 6.1 Write Enable (WREN) . 16 6.2 Write Disable (WRDI) 17 6.3 Read Identification (RDID) 18 6.4 Read Status Register (RDSR) . 19 6.4.1 WIP bit 19 6.4.2 WEL bit . 19 6.4.3 BP1, BP0 bits . 19 6.4.4 SRWD bit 19 6.5 Write Status Register (WRSR) . 21 2/49