M74HC123 DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR HIGH SPEED : t = 23 ns (TYP.) at V = 6V PD CC LOW POWER DISSIPATION: STAND BY STATE : I =4A (MAX.) at T =25C CC A ACTIVE STATE : I =200A (MAX.) at V = 5V DIP SOP TSSOP CC CC HIGH NOISE IMMUNITY: V = V = 28 % V (MIN.) NIH NIL CC SYMMETRICAL OUTPUT IMPEDANCE: ORDER CODES I = I = 4mA (MIN) OH OL PACKAGE TUBE T & R BALANCED PROPAGATION DELAYS: DIP M74HC123B1R t t PLH PHL SOP M74HC123M1R M74HC123RM13TR WIDE OPERATING VOLTAGE RANGE: TSSOP M74HC123TTR V (OPR) = 2V to 6V CC WIDE OUTPUT PULSE WIDTH RANGE : t = 120 ns ~ 60 s OVER AT V = 4.5 V WOUT CC period determined by the external resistor Rx and PIN AND FUNCTION COMPATIBLE WITH capacitor Cx. When Cx > 10nF and Rx > 10K, 74 SERIES 123 the output pulse width value is approsimatively given by the formula : tW(OUT) = K Cx Rx. DESCRIPTION (K 0.45). The M74HC123 is an high speed CMOS Taking CLR low breaks this MONOSTABLE MONOSTABLE MULTIVIBRATOR fabricated with STATE. If the next trigger pulse occurs during the 2 silicon gate C MOS technology. MONOSTABLE period it makes the There are two trigger inputs, A INPUT (negative MONOSTABLE period longer. Limit for values of edge) and B INPUT (positive edge). These inputs Cx and Rx : Cx : NO LIMIT are valid for slow rising/falling signals, (tr=tf=l sec). Rx : V < 3.0V 5K to 1M cc The device may also be triggered by using the V > 3.0V 1K to 1M cc CLR input (positive-edge) because of the All inputs are equipped with protection circuits Schmitt-trigger input after triggering the output against static discharge and transient excess maintains the MONOSTABLE state for the time voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/12M74HC123 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION Trigger Inputs (Negative 1,9 1A, 2A Edge Triggered) Trigger Inputs (Positive 2, 10 1B, 2B Edge Triggered) Direct Reset LOW and 1 CLR 3, 11 trigger Action at Positive 2 CLR Edge 4, 12 1Q, 2Q Outputs (Active Low) External Resistor 2R /C 7 X X Capacitor Connection 13, 5 1Q, 2Q Outputs (Active High) 1C External Capacitor X 14, 6 2C Connection X External Resistor 1R /C 15 X X Capacitor Connection 8 GND Ground (0V) 16 Vcc Positive Supply Voltage TRUTH TABLE INPUTS OUTPUTS NOTE A BCLR QQ H H OUTPUT ENABLE X L H L H INHIBIT H X H L H INHIBIT L H OUTPUT ENABLE L H OUTPUT ENABLE X X L L H INHIBIT X : Dont Care 2/12