M74HC257 QUAD 2 CHANNEL MULTIPLEXER (3-STATE) HIGH SPEED : t = 11 ns (TYP.) at V = 6V PD CC LOW POWER DISSIPATION: I =4A(MAX.) at T =25C CC A HIGH NOISE IMMUNITY: V = V = 28 % V (MIN.) NIH NIL CC DIP SOP TSSOP SYMMETRICAL OUTPUT IMPEDANCE: I = I = 6mA (MIN) OH OL BALANCED PROPAGATION DELAYS: t t PLH PHL ORDER CODES WIDE OPERATING VOLTAGE RANGE: PACKAGE TUBE T & R V (OPR) = 2V to 6V CC DIP M74HC257B1R PIN AND FUNCTION COMPATIBLE WITH SOP M74HC257M1R M74HC257RM13TR 74 SERIES 257 TSSOP M74HC257TTR DESCRIPTION The M74HC257 is an high speed CMOS QUAD 2 When the ENABLE input is heldHig, outputs of CHANNEL MULTIPLEXER (3-STATE) fabricated the IC become in a High-Impedance state. If 2 with silicon gate C MOS technology. SELECT input is held low, data is selected, This IC is composed of an independent 2-channel when SELECT is high , data is chosen. multiplexer with common SELECT and ENABLE All inputs are equipped with protection circuits (OE) input. against static discharge and transient excess The M74HC257 is a non-inverting multiplexer. voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/11 Obsolete Product(s) - Obsolete Product(s)M74HC257 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION Common Data Select 1 SELECT Input 2, 5, 14, 11 1A to 4A Data Input From Source A 3, 6, 13, 10 1B to 4B Data Input From Source B 3 State Multiplexer 4, 7, 12, 9 1Y to 4Y Outputs 3 State Output Enable 15 OE Inputs (Active Low) 8 GND Ground (0V) 16 Vcc Positive Supply Voltage TRUTH TABLE INPUTS OUTPUT OE SELECT A B Y HX XX Z LLL X L LL H X H LH X L L LH X H H X : Dont Care Z : High Impedance LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/11 Obsolete Product(s) - Obsolete Product(s)