PM6670ASTR STMicroelectronics

PM6670AS Complete DDR2/3 memory power supply controller Features Switching section (VDDQ) 4.5 V to 36 V input voltage range 0.9 V, 1% voltage reference 1.8 V (DDR2) or 1.5 V (DDR3) fixed output voltages 0.9 V to 2.6 V adjustable output voltage 1.237 V 1% reference voltage available Very fast load transient response using constant-on-time control loop Description No R current sensing using low side SENSE The device PM6670AS is a complete DDR2/3 MOSFETs R DS(ON) power supply regulator designed to meet JEDEC Negative current limit specifications. Latched OVP and UVP It integrates a constant on-time (COT) buck Soft-start internally fixed at 3 ms controller, a 2 Apk sink/source low drop out Selectable pulse skipping at light load regulator and a 15 mA low noise buffered selectable no-audible (33 kHz) pulse skip reference. mode The COT architecture assures fast transient Ceramic output capacitors supported response supporting both electrolytic and ceramic Output voltage ripple compensation output capacitors. An embedded integrator VTT LDO and VTTREF control loop compensates the DC voltage error 2 Apk LDO with foldback for VTT due to the output ripple. Remote VTT sensing The 2 Apk sink/source linear regulator provides High-Z VTT output in S3 the memory termination voltage with fast load Ceramic output capacitors supported transient response. 15 mA Low noise buffered reference The device is full compliant with system sleep states S3 and S4/S5, providing LDO output high Applications impedance in Suspend-To-RAM and Tracking Discharge of all outputs in Suspend-To-Disk. DDR2/3 memory supply Digital TV system SSTL18, SSTL15 and HSTL bus termination Table 1. Device summary Order codes Package Packaging PM6670AS Tube VFQFPN-24 4x4 (Exposed pad) PM6670ASTR Tape and reel February 2010 Doc ID 14436 Rev 2 1/53 www.st.com 53Contents PM6670AS Contents 1 Typical application circuit 4 2 Pin settings 5 2.1 Connections 5 2.2 Pin description 6 3 Electrical data 8 3.1 Maximum rating . 8 3.2 Thermal data . 8 3.3 Recommended operating conditions . 8 4 Electrical characteristics . 9 5 Typical operating characteristics . 13 6 Block diagram . 18 7 Device description . 19 7.1 VDDQ section - constant on-time PWM controller 20 7.1.1 Constant-on-time architecture 22 7.1.2 Output ripple compensation and loop stability 23 7.1.3 Pulse-skip and no-audible pulse-skip modes . 28 7.1.4 Mode-of-operation selection . 29 7.1.5 Current sensing and current limit 30 7.1.6 POR, UVLO and soft-start . 31 7.1.7 Power-Good signal 33 7.1.8 VDDQ output discharge . 33 7.1.9 Gate drivers 34 7.1.10 Reference voltage and bandgap 34 7.1.11 Over voltage and under voltage protections . 35 7.1.12 Device thermal protection . 35 7.2 VTTREF buffered reference and VTT LDO section . 36 7.2.1 VTT and VTTREF soft-start 36 7.2.2 VTTREF and VTT outputs discharge . 36 2/53 Doc ID 14436 Rev 2