SPC560B64L5C6E0X STMicroelectronics

SPC560B54x, SPC560B60x, SPC560B64x 32-bit MCU family built on the Power Architecture for automotive body electronics applications Datasheet - production data Dedicated diagnostic module for lighting Advanced PWM generation Time-triggered diagnostics PWM-synchronized ADC measurements LQFP100 LQFP144 LQFP176 (14 x 14 x 1.4 mm) (20 x 20 x 1.4 mm) (24 x 24 x 1.4 mm) On-chip CAN/UART bootstrap loader Communications interfaces Features Up to 6 FlexCAN (2.0B active) with 64 message buffers each High performance 64 MHz e200z0h CPU Up to 10 LINFlex/UART channels 32-bit Power Architecture technology Up to 6 buffered DSPI channels CPU 2 I C interface Up to 60 DMIPs operation Clock generation Variable length encoding (VLE) 4 to 16 MHz fast external crystal oscillator Memory 32 kHz slow external crystal oscillator Up to 1.5 MB on-chip Code Flash with ECC 16 MHz fast internal RC oscillator 64 KB on-chip Data Flash with ECC 128 kHz slow internal RC oscillator for low- Up to 96 KB on-chip SRAM with ECC power modes 8-entry MPU Software-controlled FMPLL Interrupts Clock monitoring unit 16 priority levels Low-power capabilities Non-maskable interrupt (NMI) Several low-power mode configurations Up to 51 external interrupts lines including Ultra-low-power standby with RTC and 27 wake-up lines communication 16-channel eDMA (linked to PITs, DSPI, Fast wakeup schemes 2 ADCs, eMIOS, LINFlex and I C) Exhaustive debugging capability GPIOs: 77 (LQFP100), 121 (LQFP144) and Nexus 2+ interface on LBGA208 package 149 (LQFP176) Nexus 1 on all packages Timer units Voltage supply 8-channel 32-bit periodic interrupt timer Single 5 V or 3.3 V supply 4-channel 32-bit system timer On-chip voltage regulator System watchdog timer External ballast resistor support Real-time clock timer LQFP100, LQFP144, and LQFP176 packages eMIOS, 16-bit counter timed I/O units LBGA208 package for Nexus2+ Up to 64 channels with PWM/MC/IC/OC Operating temperature range -40 to 125 C Up to 10 counter basis Table 1. Device summary ADC diagnostic trigger via CTU One 10-bit and one 12-bit ADC with up to 53 768 KByte 1 MByte 1.5 MByte Package channels Code Flash Code Flash Code Flash Extendable to 81 channels LQFP176 SPC560B60L7 SPC560B64L7 Individual conversion registers LQFP144 SPC560B54L5 SPC560B60L5 SPC560B64L5 Cross triggering unit (CTU) LQFP100 SPC560B54L3 SPC560B60L3 SPC560B64L3 January 2016 DocID15131 Rev 9 1/133 This is information on a product in full production. www.st.comContents SPC560B54x/6x Contents 1 Introduction 8 1.1 Document overview 8 1.2 Description . 8 2 Block diagram . 10 3 Package pinouts and signal descriptions . 13 3.1 Package pinouts 13 3.2 Pad configuration during reset phases . 16 3.3 Pad configuration during standby mode exit 17 3.4 Voltage supply pins . 17 3.5 Pad types . 18 3.6 System pins . 18 3.7 Functional port pins . 19 3.8 Nexus 2+ pins . 55 4 Electrical characteristics 56 4.1 Parameter classification 56 4.2 NVUSRO register . 56 4.2.1 NVUSRO PAD3V5V field description 57 4.2.2 NVUSRO OSCILLATOR MARGIN field description . 57 4.2.3 NVUSRO WATCHDOG EN field description 57 4.3 Absolute maximum ratings 58 4.4 Recommended operating conditions 59 4.5 Thermal characteristics 61 4.5.1 External ballast resistor recommendations 61 4.5.2 Package thermal characteristics 61 4.5.3 Power considerations 62 4.6 I/O pad electrical characteristics . 63 4.6.1 I/O pad types . 63 4.6.2 I/O input DC characteristics 63 4.6.3 I/O output DC characteristics . 65 4.6.4 Output pin transition times . 67 2/133 DocID15131 Rev 9