SPC56AP60x, SPC56AP54x SPC560P60x, SPC560P54x 32-bit Power Architecture based MCU with 1088KB Flash memory and 80KB RAM for automotive chassis and safety applications Datasheet - production data General purpose I/Os (80 GPIO + 26 GPI on LQFP144 49 GPIO + 16 GPI on LQFP100) 2 general purpose eTimer units 6 timers, each with up/down count LQFP100 capabilities LQFP144 14 x 14 mm 20 x 20 mm 16-bit resolution, cascadable counters Quadrature decode with rotation direction flag Features Double buffer input capture and output AEC-Q10x qualified compare 64 MHz, single issue, 32-bit CPU core complex Communications interfaces (e200z0h) 2 LINFlex modules (LIN 2.1, Compliant with Power Architecture 1 Master/Slave, 1 Master Only) embedded category 5 DSPI modules with automatic chip select Variable Length Encoding (VLE) generation Memory organization 2 FlexCAN interfaces (2.0B Active) with 32 message buffers Up to 1024 KB on-chip code Flash memory with additional 64 KB for EEPROM 1 Safety port based on FlexCAN usable as emulation (data flash), with ECC, with third CAN when not used as safety port erase/program controller 1 FlexRay module (V2.1) with dual or single channel, 64 message buffers and up Up to 80 KB on-chip SRAM with ECC to 10 Mbit/s Fail safe protection 2 CRC units with three contexts and 3 ECC protection on system SRAM and hardwired polynomials(CRC8,CRC32 and Flash CRC-16-CCITT) Safety port 10-bit A/D converter SWT with servicing sequence pseudo- 27 input channels and pre-sampling feature random generator Conversion time < 1 s including sampling Power management time at full precision Non-maskable interrupt for both cores Programmable cross triggering unit (CTU) Fault collection and control unit (FCCU) 4 analog watchdog with interrupt capability Safe mode of system-on-chip (SoC) On-chip CAN/UART Bootstrap loader with boot Register protection scheme assist module (BAM) Nexus L2+ interface Ambient temperature ranges: 40 to 125 C or 40 to 105 C Single 3.3 V or 5 V supply for I/Os and ADC 2 on-platform peripherals set with 2 INTC 16-channel eDMA controller with multiple transfer request sources June 2016 DocID18340 Rev 6 1/105 This is information on a product in full production. www.st.comSPC56xP54x, SPC56xP60x Table 1. Device summary Part number Package 768 KB Flash 1 MB Flash SPC560P54L5 SPC560P60L5 LQFP144 SPC56AP54L5 SPC56AP60L5 SPC560P54L3 SPC560P60L3 LQFP100 SPC56AP54L3 SPC56AP60L3 2/105 DocID18340 Rev 6