SPV1040 Datasheet High efficiency solar battery charger with embedded MPPT Features 0.3 V to 5.5 V operating input voltage 140 m internal synchronous rectifier 120 m internal power active switch 100 kHz fixed PWM frequency Duty cycle controlled by MPPT algorithm Output voltage regulation, overcurrent and overtemperature protection Input source reverse polarity protection Built-in soft-start Up to 95% efficiency TSSOP8 package 3x4.4 mm Applications Smart phones and GPS systems Wireless headsets Small appliances, sensors Portable media players Digital still cameras Toys and portable healthcare Product status link Description SPV1040 The SPV1040 device is a low power, low voltage, monolithic step-up converter with an input voltage range from 0.3 V to 5.5 V, capable of maximizing the energy Product summary generated by solar cells (or fuel cells), where low input voltage handling capability is extremely important. Thanks to the embedded MPPT algorithm, even under varying Order code SPV1040T environmental conditions (such as irradiation, dirt, temperature) the SPV1040 offers Package TSSOP8 maximum efficiency in terms of power harvested from the cells and transferred to the output. The device employs a voltage regulation loop, which fixes the charging Packing Tube battery voltage via a resistor divider. Order code SPV1040TR It is possible to set the maximum output current according to charging requirements Package TSSOP8 by a sense resistor . Packing Tape and reel The SPV1040 protects itself and other application devices by stopping the PWM switching if either the maximum current threshold (up to 1.8 A ) is reached or pk Product label the maximum temperature limit (up to 155 C) is exceeded. An additional built-in feature of the SPV1040 is the input source reverse polarity protection, which prevents damage in case of reverse connection of the solar panel on the input. DS6991 - Rev 9 - February 2021 www.st.com For further information contact your local STMicroelectronics sales office.CONTROL DRIVERS SPV1040 Block diagram 1 Block diagram Figure 1. Block diagram Lx VOUT START SIGNAL ZERO- CROSSING - DETECTOR + I CTRL PLUS VREF ANALOG BLOCK V MPP-REF + OVERCURRENT XSHUT OVERTEMPERATURE - REVERSE POLARITY I CTRL MI NUS CLOCK PWM V MPP-REF + MPP BLOCK MPP-SET BURST MODE DIGITAL CORE MPP-SET - DAC CODE Iout Reg VCTRL Vin Reg + GND Vout Reg VREF - Figure 2. Simplified application circuit L R V S BATT Lx VOUT R F1 XSHUT I CTRL PLUS V PV CF RF2 GND I CTRL MI NUS R1 C OUT MPP-SET C VCTRL IN R2 AM02612v1 In order to set up the application and simulate the related test results please go to www.st.com. DS6991 - Rev 9 page 2/16 Burst Ref CLOCK