ST25R3912-AWLT STMicroelectronics

ST25R3912 High performance HF reader / NFC initiator for payment applications with 1 W output power Datasheet - production data Description The ST25R3912 is a highly integrated NFC Initiator / HF Reader IC, including the analog front end (AFE) and a highly integrated data framing system for ISO 18092 (NFCIP-1) initiator, ISO 18092 (NFCIP-1) active target, ISO 14443A and B reader (including high bit rates), ISO 15693 reader and FeliCa reader. Implementation of WLCSP QFN32 / VFQFPN32 other standard and custom protocols like MIFARE Classic is possible using the AFE and implementing framing in the external Features microcontroller (Stream and Transparent modes). ISO 18092 (NFCIP-1) Active P2P The ST25R3912 is positioned perfectly for the ISO14443A, ISO14443B, ISO15693 and infrastructure side of the NFC system, where FeliCa users need optimal RF performance and flexibility combined with low power. Supports HBR up to 848 kbit/s PICC to PCD and PCD to PICC framing The device is optimized for applications with directly driven antennas. The ST25R3912 is Inductive sensing - Wake-up alone in the domain of HF reader ICs as it Automatic modulation index adjustment contains two differential low impedance (1 Ohm) AM and PM (I/Q) demodulator channels with antenna drivers. automatic selection The ST25R3912 includes several features that Up to 1 W in case of differential output make it very suited for low power applications. User selectable and automatic gain control The presence of a card can be detected by performing a measurement of amplitude or phase Transparent and Stream modes to implement of signal on antenna LC tank, and comparing it to MIFARE Classic compliant or other custom the stored reference. It also contain a low power protocols RC oscillator and wake-up timer that can be used Possibility of driving two antennas in single to wake up the system after a defined time period, ended mode and to check for the presence of a tag using one Oscillator input capable of operating with 13.56 or more low power detection techniques (phase or 27.12 MHz crystal with fast start-up or amplitude). 6 Mbit/s SPI with 96 bytes FIFO The ST25R3912 is designed to operate from a wide (2.4 to 5.5 V) power supply range peripheral Wide supply voltage range from 2.4 to 5.5 V interface IO pins support power supply range Wide temperature range: -40 C to 125 C from 1.65 to 5.5 V. VFQFPN32, 5 mm x 5 mm package with wettable flanks WLCSP, 3.0 mm x 2.8 mm package February 2021 DS11794 Rev 7 1/130 This is information on a product in full production. www.st.comContents ST25R3912 Contents 1 Functional overview 10 1.1 Block diagram 10 1.1.1 Transmitter . 10 1.1.2 Receiver . 11 1.1.3 Phase and amplitude detector 11 1.1.4 A/D converter . 11 1.1.5 External field detector 11 1.1.6 Quartz crystal oscillator . 12 1.1.7 Power supply regulators 12 1.1.8 POR and bias 12 1.1.9 RC oscillator and wake-up timer 12 1.1.10 ISO-14443 and NFCIP-1 framing . 12 1.1.11 FIFO 13 1.1.12 Control logic 13 1.1.13 SPI . 13 1.2 Application information . 13 1.2.1 Operating modes 14 1.2.2 Transmitter . 15 1.2.3 Receiver . 16 1.2.4 Wake-Up mode . 21 1.2.5 Quartz crystal oscillator . 23 1.2.6 Timers 23 1.2.7 A/D converter . 25 1.2.8 Phase and amplitude detector 25 1.2.9 External field detector 26 1.2.10 Power supply system . 27 1.2.11 Communication with an external microcontroller 30 1.2.12 Direct commands 39 1.2.13 Start timers 47 1.2.14 Test access 47 1.2.15 Power-up sequence 49 1.2.16 Reader operation 49 1.2.17 FeliCa reader mode 54 1.2.18 NFCIP-1 operation . 55 2/130 DS11794 Rev 7