STA323W13TR STMicroelectronics

STA323W 2.1 channel high-efficiency digital audio system Datasheet - production data Individual channel volume and EQ bypass DDX POP free operation Bass/treble tone control Dual independent programmable limiters/compressors AutoModes settings for: 32 preset EQ curves 15 preset crossover settings PowerSO-36 Auto volume controlled loudness (slug down) 3 preset volume curves 2 preset anti-clipping modes Preset night-time listening mode Preset TV AGC Features Input and output channel mapping Wide supply voltage range (10 V - 36 V) AM noise-reduction and PWM frequency shifting modes Three power output configurations 2 x10W + 1 x20W Soft volume update and muting 2x20W Auto zero detect and invalid input detect 1x40W muting selectable DDX ternary or binary PWM output plus variable PWM speeds Thermal protection Selectable de-emphasis Under-voltage protection Post-EQ user programmable mix with default Short-circuit protection 2.1 bass-management settings PowerSO-36 slug down package Variable max power correction for lower 2.1 channels of 24-bit DDX full-power THD 100-dB SNR and dynamic range Four output routing configurations 32 kHz to 192 kHz input sample rates Selectable clock input ratio Digital gain/attenuation +48dB to -80dB in 96 kHz internal processing sample rate, 24 to 0.5-dB steps 28-bit precision Four 28-bit user programmable biquads (EQ) Video application supports 576 * fs input mode per channel IC control Table 1. Device summary 2-channel IS input data interface Order code Package Individual channel and master gain/attenuation STA323W13TR PowerSO-36 in tape & reel Individual channel and master soft and hard mute February 2014 DocID11535 Rev 7 1/78 This is information on a product in full production. www.st.comContents STA323W Contents 1 Description 10 1.1 EQ processing 11 1.2 Output options 11 2 Applications . 12 3 Pin out . 14 3.1 Pin numbering . 14 3.2 Pin description . 15 4 Electrical specifications . 17 4.1 General interface specifications 17 4.2 DC electrical specifications (3.3 V buffers) 18 4.3 Power electrical specifications . 18 4.4 Timing specifications 19 4.5 Power supply and control sequencing . 20 5 Electrical characteristics curves 21 5.1 Output power against supply voltage 21 5.2 Audio performance 23 5.2.1 Stereo mode, operation with V = 26 V, 8 load 23 CC 5.2.2 Stereo mode, operation with V = 18.5 V 24 CC 5.2.3 Half-bridge binary mode, operation with Vcc = 18.5 V 28 6 IC bus specification 33 6.1 Communication protocol 33 6.2 Device addressing 33 6.3 Write operation . 34 6.4 Read operation . 34 7 Register descriptions . 36 7.1 Configuration register A (address 0x00) 37 7.1.1 Master clock select 37 2/78 DocID11535 Rev 7