STA339BWTR STMicroelectronics

STA339BW 2.1-channel high-efficiency digital audio system Datasheet - production data Dedicated LFE processing for bass boosting with 0.5 dB/step resolution Audio presets: 15 preset crossover filters 5 preset anti-clipping modes Preset night-time listening mode Individual channel and master soft/hard mute PowerSSO-36 (slug down) Independent channel volume and DSP bypass Automatic zero-detect mute Features Automatic invalid input-detect mute 2 Wide voltage supply range 2-channel I S input data interface 5 V to 26 V (operating range) Input and output channel mapping 30 V (absolute maximum rating) Up to 8 user-programmable biquads per 3 power output configurations channel with 28-bit resolution 2 channels of ternary PWM (stereo mode) 3 coefficient banks for EQ presets storing with 2 (2 x 20 W into 8 at 18 V) fast recall via I C interface 3 channels - left, right using binary and LFE Bass/treble tones and de-emphasis control using ternary PWM (2.1 mode) (2 x 9 W + Selectable high-pass filter for DC blocking 1 x 20 W into 2 x 4 , 1 x 8 at 18 V) Advanced AM interference frequency 2 channels of ternary PWM (2 x 20 W) + switching and noise suppression modes stereo lineout ternary Selectable high- or low-bandwidth 2.1 channels of 24-bit FFX 100 dB SNR and noise-shaping topologies dynamic range Variable max power correction for lower Selectable 32 to 192 kHz input sample rates full-power THD 2 I C control with selectable device address Selectable clock input ratio Digital gain/attenuation +48 dB to -80 dB with 96 kHz internal processing sample rate, 24 to 0.5 dB/step resolution 28-bit precision Soft volume update with programmable ratio Thermal overload and short-circuit protection Individual channel and master gain/attenuation embedded Two independent DRC configurable as a Video apps: 576 * f input mode supported 2 S dual-band anti-clipper (B DRC) or as Fully compatible with STA339BWS. independent limiters/compressors EQ-DRC for DRC based on filtered signals Table 1. Device summary Order code Package Packaging STA339BWTR PowerSSO-36 slug down Tape and reel January 2015 DocID15251 Rev 8 1/78 This is information on a product in full production. www.st.comContents STA339BW Contents 1 Description 10 1.1 Block diagram 11 2 Pin connections 12 2.1 Connection diagram . 12 2.2 Pin description . 12 3 Electrical specifications . 14 3.1 Absolute maximum ratings 14 3.2 Thermal data 14 3.3 Recommended operating conditions 15 3.4 Electrical specifications for the digital section . 15 3.5 Electrical specifications for the power section . 16 3.6 Power on/off sequence . 18 3.7 Testing . 19 3.7.1 Functional pin definition . 19 4 Serial audio interface . 20 4.0.1 Timings . 20 4.0.2 Delay serial clock enable 20 4.0.3 Channel input mapping . 20 5 Processing data paths 21 2 6I C bus specification 23 6.1 Communication protocol 23 6.1.1 Data transition or change 23 6.1.2 Start condition 23 6.1.3 Stop condition 23 6.1.4 Data input . 23 6.2 Device addressing 23 6.3 Write operation . 24 6.3.1 Byte write 24 2/78 DocID15251 Rev 8