STEVAL-IPE007V1 STMicroelectronics

ST7LITE20F2 ST7LITE25F2 ST7LITE29F2 8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, Timers, SPI Datasheet - production data Features Memories 8 Kbytes single voltage Flash Program memory with Read-out protection In-circuit programming and in-application DIP20 SO20 300 programming (ICP and IAP) 10K write/erase cycles guaranteed 1 communication interface Data retention: 20 years at 55 C SPI synchronous serial interface. Temperature ranges: -40 C to +85 C Interrupt management -40 C to +105 C 10 interrupt vectors plus TRAP and RESET 384 bytes RAM 15 external interrupt lines (on 4 vectors) Clock, reset and supply management A/D converter Enhanced reset system 7 input channels Enhanced low voltage supervisor (LVD) for Fixed gain op-amp main supply and an auxiliary voltage 13-bit resolution for 0 to 430 mV detector (AVD) with interrupt capability for ( 5 V V ) DD implementing safe power-down procedures 10-bit resolution for 430 mV to 5 V ( 5 V Clock sources: internal 1% RC oscillator, V ) DD crystal/ceramic resonator or external clock Instruction set Internal 32-MHz input clock for auto-reload 8-bit data manipulation timer 63 basic instructions with illegal opcode Optional x4 or x8 PLL for 4 or 8 MHz detection internal clock 17 main addressing modes Five power saving modes: Halt, Active-halt, 8 x 8 unsigned multiply instructions Wait and Slow, Auto-wakeup from Halt Development tools I/O ports Full hardware/software development Up to 15 multifunctional bidirectional I/O package lines DM (debug module) 7 high sink outputs 4 timers Configurable watchdog timer Two 8-bit Lite timers with prescaler 1 real-time base and 1 input capture One 12-bit auto-reload timer with 4 PWM outputs, input capture and output compare functions January 2014 DocID8349 Rev 7 1/170 This is information on a product in full production. www.st.comContents ST7LITE20F2 ST7LITE25F2 ST7LITE29F2 Contents 1 Description 13 2 Pin description 15 3 Register & memory map . 18 4 Flash program memory . 21 4.1 Introduction . 21 4.2 Main features 21 4.3 Programming modes 21 4.3.1 In-circuit programming (ICP) . 21 4.3.2 In-application programming (IAP) . 22 4.4 ICC interface 22 4.5 Memory protection 23 4.5.1 Read-out protection 23 4.5.2 Flash write/erase protection 23 4.6 Related documentation 24 4.7 Register description . 24 5 Data EEPROM . 25 5.1 Introduction . 25 5.2 Main features 25 5.3 Memory access 25 5.4 Power saving modes 27 5.5 Access error handling 27 5.6 Data EEPROM Read-out protection . 28 5.7 Register description . 28 6 Central processing unit . 30 6.1 Introduction . 30 6.2 Main features 30 6.3 CPU registers 30 2/170 DocID8349 Rev 7