STM32F050x4 STM32F050x6 Low- and medium-density advanced ARM -based 32-bit MCU with up to 32 Kbyte Flash, timers, ADC and comm. interfaces Datasheet - not recommended for new design Features Core: 32-bit ARM Cortex -M0 CPU, frequency up to 48 MHz Memories LQFP48 UFQFPN32 7 x 7 mm 16 to 32 Kbyte of Flash memory 5 x 5 mm TSSOP20 UFQFPN28 6.5 x 6.4 mm 4 Kbyte of SRAM with HW parity checking 4 x 4 mm CRC calculation unit 1 x 16-bit timer with 1 IC/OC Reset and supply management Independent and system watchdog timers SysTick timer: 24-bit downcounter Voltage range: 2.0 V to 3.6 V Power-on/Power-down reset (POR/PDR) Calendar RTC with alarm and periodic wakeup from Stop/Standby Programmable voltage detector (PVD) Low power modes: Sleep, Stop and Communication interfaces 2 Standby 1 x I C interface supporting Fast Mode V supply for RTC and backup registers Plus (1 Mbit/s) with 20 mA current sink, BAT SMBus/PMBus, and wakeup from STOP Clock management 1 x USART supporting master synchronous 4 to 32 MHz crystal oscillator SPI and modem control one with ISO7816 32 kHz oscillator for RTC with calibration interface, LIN, IrDA capability auto baud Internal 8 MHz RC with x6 PLL option rate detection and wakeup feature Internal 40 kHz RC oscillator 1 x SPI (18 Mbit/s) with 4 to 16 2 programmable bit frames, with I S interface Up to 39 fast I/Os multiplexed All mappable on external interrupt vectors Serial wire debug (SWD) Up to 25 I/Os with 5 V tolerant capability 96-bit unique ID 5-channel DMA controller Extended temperature range: -40 to +105C 1 12-bit, 1.0 s ADC (up to 10 channels) Conversion range: 0 to 3.6V Table 1. Device summary Separate analog supply from 2.4 up to 3.6 V Reference Part number Up to 9 timers STM32F050C4, STM32F050F4, STM32F050x4 1 x 16-bit 7-channel advanced-control timer STM32F050G4, STM32F050K4 for 6 channels PWM output, with deadtime STM32F050C6, STM32F050F6, generation and emergency stop STM32F050x6 STM32F050G6, STM32F050K6 1 x 32-bit and 1 x 16-bit timer, with up to 4 IC/OC, usable for IR control decoding 1 x 16-bit timer, with 2 IC/OC, 1 OCN, deadtime generation and emergency stop 1 x 16-bit timer, with IC/OC and OCN, deadtime generation, emergency stop and modulator gate for IR control April 2015 DocID023683 Rev 2 1/101 This is information on a product still in production but not recommended for new designs. www.st.comContents STM32F050x4 STM32F050x6 Contents 1 Introduction 9 2 Description 10 3 Functional overview 12 3.1 ARM Cortex-M0 core with embedded Flash and SRAM . 12 3.2 Memories . 12 3.3 Boot modes . 12 3.4 Cyclic redundancy check calculation unit (CRC) . 13 3.5 Power management . 13 3.5.1 Power supply schemes . 13 3.5.2 Power supply supervisors . 13 3.5.3 Voltage regulator 14 3.5.4 Low-power modes . 14 3.6 Clocks and startup 15 3.7 General-purpose inputs/outputs (GPIOs) . 16 3.8 Direct memory access controller (DMA) 16 3.9 Interrupts and events 16 3.9.1 Nested vectored interrupt controller (NVIC) 16 3.9.2 Extended interrupt/event controller (EXTI) 16 3.10 Analog to digital converter (ADC) . 17 3.10.1 Temperature sensor 17 3.10.2 Internal voltage reference (V ) . 17 REFINT 3.11 Timers and watchdogs . 18 3.11.1 Advanced-control timer (TIM1) . 18 3.11.2 General-purpose timers (TIM2..3, TIM14..17) 18 3.11.3 Independent watchdog (IWDG) . 19 3.11.4 System window watchdog (WWDG) . 19 3.11.5 SysTick timer . 20 3.12 Real-time clock (RTC) and backup registers 20 2 3.13 Inter-integrated circuit interface (I C) 21 3.14 Universal synchronous/asynchronous receiver transmitter (USART) . 21 2 3.15 Serial peripheral interface (SPI)/Inter-integrated sound interfaces (I S) . 22 2/101 DocID023683 Rev 2