STM32F103x4 STM32F103x6 Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 com. interfaces Datasheet production data Features )%* ARM 32-bit Cortex-M3 CPU Core 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) LQFP64 (10 10 mm) performance at 0 wait state memory TFBGA64 (5 5 mm) LQFP48 (7 7mm) access Single-cycle multiplication and hardware division Memories VFQFPN36 (6 6 mm) UFQFPN48 (7 7 mm) 16 or 32 Kbytes of Flash memory 6 or 10 Kbytes of SRAM Debug mode Clock, reset and supply management Serial wire debug (SWD) & JTAG interfaces 2.0 to 3.6 V application supply and I/Os POR, PDR, and programmable voltage 6 timers detector (PVD) Two 16-bit timers, each with up to 4 4-to-16 MHz crystal oscillator IC/OC/PWM or pulse counter and quadrature (incremental) encoder input Internal 8 MHz factory-trimmed RC 16-bit, motor control PWM timer with dead- Internal 40 kHz RC time generation and emergency stop PLL for CPU clock 2 watchdog timers (Independent and 32 kHz oscillator for RTC with calibration Window) Low power SysTick timer 24-bit downcounter Sleep, Stop and Standby modes 6 communication interfaces V supply for RTC and backup registers BAT 2 1 x I C interface (SMBus/PMBus) 2 x 12-bit, 1 s A/D converters (up to 16 2 USARTs (ISO 7816 interface, LIN, IrDA channels) capability, modem control) Conversion range: 0 to 3.6 V 1 SPI (18 Mbit/s) Dual-sample and hold capability CAN interface (2.0B Active) Temperature sensor USB 2.0 full-speed interface DMA CRC calculation unit, 96-bit unique ID 7-channel DMA controller Packages are ECOPACK Peripherals supported: timers, ADC, SPIs, 2 Table 1. Device summary I Cs and USARTs Reference Part number Up to 51 fast I/O ports 26/37/51 I/Os, all mappable on 16 external STM32F103C4, STM32F103R4, STM32F103x4 interrupt vectors and almost all 5 V-tolerant STM32F103T4 STM32F103C6, STM32F103R6, STM32F103x6 STM32F103T6 June 2015 DocID15060 Rev 7 1/99 This is information on a product in full production. www.st.comContents STM32F103x4, STM32F103x6 Contents 1 Introduction 9 2 Description 10 2.1 Device overview .11 2.2 Full compatibility throughout the family 14 2.3 Overview . 15 2.3.1 ARM Cortex-M3 core with embedded Flash and SRAM . 15 2.3.2 Embedded Flash memory . 15 2.3.3 CRC (cyclic redundancy check) calculation unit 15 2.3.4 Embedded SRAM . 15 2.3.5 Nested vectored interrupt controller (NVIC) 15 2.3.6 External interrupt/event controller (EXTI) . 16 2.3.7 Clocks and startup . 16 2.3.8 Boot modes 16 2.3.9 Power supply schemes . 16 2.3.10 Power supply supervisor 16 2.3.11 Voltage regulator 17 2.3.12 Low-power modes . 17 2.3.13 DMA 18 2.3.14 RTC (real-time clock) and backup registers 18 2.3.15 Timers and watchdogs 18 2.3.16 IC bus 20 2.3.17 Universal synchronous/asynchronous receiver transmitter (USART) 20 2.3.18 Serial peripheral interface (SPI) . 20 2.3.19 Controller area network (CAN) . 20 2.3.20 Universal serial bus (USB) . 20 2.3.21 GPIOs (general-purpose inputs/outputs) 21 2.3.22 ADC (analog-to-digital converter) . 21 2.3.23 Temperature sensor 21 2.3.24 Serial wire JTAG debug port (SWJ-DP) . 21 3 Pinouts and pin description 22 4 Memory mapping . 29 2/10 DocID15060 Rev 7