STM32F103xF STM32F103xG XL-density performance line ARM-based 32-bit MCU with 768 KB to 1 MB Flash, USB, CAN, 17 timers, 3 ADCs, 13 com. interfaces Datasheet production data Features Core: ARM 32-bit Cortex -M3 CPU with MPU 72 MHz maximum frequency, LQFP64 10 10 mm, LFBGA144 10 10 mm 1.25 DMIPS/MHz (Dhrystone 2.1) LQFP100 14 14 mm, LQFP144 20 20 mm performance at 0 wait state memory access Serial wire debug (SWD) & JTAG Single-cycle multiplication and hardware interfaces division Cortex -M3 Embedded Trace Macrocell Memories Up to 112 fast I/O ports 768 Kbytes to 1 Mbyte of Flash memory 51/80/112 I/Os, all mappable on 16 96 Kbytes of SRAM external interrupt vectors and almost all Flexible static memory controller with 4 5 V-tolerant Chip Select. Supports Compact Flash, Up to 17 timers SRAM, PSRAM, NOR and NAND memories Up to ten 16-bit timers, each with up to 4 LCD parallel interface, 8080/6800 modes IC/OC/PWM or pulse counter and Clock, reset and supply management quadrature (incremental) encoder input 2.0 to 3.6 V application supply and I/Os 2 16-bit motor control PWM timers with dead-time generation and emergency stop POR, PDR, and programmable voltage detector (PVD) 2 watchdog timers (Independent and Window) 4-to-16 MHz crystal oscillator SysTick timer: a 24-bit downcounter Internal 8 MHz factory-trimmed RC 2 16-bit basic timers to drive the DAC Internal 40 kHz RC with calibration 32 kHz oscillator for RTC with calibration Up to 13 communication interfaces 2 Up to 2 I C interfaces (SMBus/PMBus) Low power Up to 5 USARTs (ISO 7816 interface, LIN, Sleep, Stop and Standby modes IrDA capability, modem control) V supply for RTC and backup registers BAT 2 Up to 3 SPIs (18 Mbit/s), 2 with I S 3 12-bit, 1 s A/D converters (up to 21 interface multiplexed channels) CAN interface (2.0B Active) Conversion range: 0 to 3.6 V USB 2.0 full speed interface Triple-sample and hold capability SDIO interface Temperature sensor CRC calculation unit, 96-bit unique ID 2 12-bit D/A converters ECOPACK packages DMA: 12-channel DMA controller Supported peripherals: timers, ADCs, DAC, Table 1. Device summary 2 2 SDIO, I Ss, SPIs, I Cs and USARTs Reference Part number Debug mode STM32F103xF STM32F103RF STM32F103VF STM32F103ZF STM32F103xG STM32F103RG STM32F103VG STM32F103ZG May 2015 DocID16554 Rev 4 1/136 This is information on a product in full production. www.st.comContents STM32F103xF, STM32F103xG Contents 1 Introduction 9 2 Description 10 2.1 Device overview .11 2.2 Full compatibility throughout the family 14 2.3 Overview . 15 2.3.1 ARM Cortex -M3 core with embedded Flash and SRAM 15 2.3.2 Memory protection unit . 15 2.3.3 Embedded Flash memory . 15 2.3.4 CRC (cyclic redundancy check) calculation unit 15 2.3.5 Embedded SRAM . 16 2.3.6 FSMC (flexible static memory controller) 16 2.3.7 LCD parallel interface 16 2.3.8 Nested vectored interrupt controller (NVIC) 16 2.3.9 External interrupt/event controller (EXTI) . 16 2.3.10 Clocks and startup . 17 2.3.11 Boot modes 17 2.3.12 Power supply schemes . 17 2.3.13 Power supply supervisor 17 2.3.14 Voltage regulator 18 2.3.15 Low-power modes . 18 2.3.16 DMA 18 2.3.17 RTC (real-time clock) and backup registers 19 2.3.18 Timers and watchdogs 19 2.3.19 IC bus 21 2.3.20 Universal synchronous/asynchronous receiver transmitters (USARTs) . 21 2.3.21 Serial peripheral interface (SPI) . 22 2 2.3.22 Inter-integrated sound (I S) 22 2.3.23 SDIO . 22 2.3.24 Controller area network (CAN) . 22 2.3.25 Universal serial bus (USB) . 22 2.3.26 GPIOs (general-purpose inputs/outputs) 22 2.3.27 ADC (analog to digital converter) 23 2.3.28 DAC (digital-to-analog converter) . 23 2/136 DocID16554 Rev 4