STM32F215xx STM32F217xx ARM -based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera Datasheet - production data Features Core: ARM 32-bit Cortex -M3 CPU (120 MHz LQFP64 (10 10 mm) max) with Adaptive real-time accelerator (ART LQFP100 (14 14 mm) UFBGA176 LQFP144 (20 20 mm) Accelerator allowing 0-wait state execution (10 10 mm) LQFP176 (24 24 mm) performance from Flash memory, MPU, Up to 140 I/O ports with interrupt capability: 150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1) Up to 136 fast I/Os up to 60 MHz Memories Up to 138 5 V-tolerant I/Os Up to 1 Mbyte of Flash memory Up to 15 communication interfaces 512 bytes of OTP memory 2 Up to 3 I C interfaces (SMBus/PMBus) Up to 128 + 4 Kbytes of SRAM Up to 4 USARTs and 2 UARTs (7.5 Mbit/s, Flexible static memory controller that ISO 7816 interface, LIN, IrDA, modem ctrl) supports Compact Flash, SRAM, PSRAM, 2 NOR and NAND memories Up to 3 SPIs (30 Mbit/s), 2 with muxed I S to achieve audio class accuracy via audio LCD parallel interface, 8080/6800 modes PLL or external PLL Clock, reset and supply management 2 CAN interfaces (2.0B Active) From 1.8 to 3.6 V application supply+I/Os SDIO interface POR, PDR, PVD and BOR Advanced connectivity 4 to 26 MHz crystal oscillator USB 2.0 full-speed device/host/OTG Internal 16 MHz factory-trimmed RC controller with on-chip PHY 32 kHz oscillator for RTC with calibration USB 2.0 high-speed/full-speed Internal 32 kHz RC with calibration device/host/OTG controller with dedicated Low-power modes DMA, on-chip full-speed PHY and ULPI Sleep, Stop and Standby modes 10/100 Ethernet MAC with dedicated DMA: V supply for RTC, 20 32 bit backup supports IEEE 1588v2 hardware, MII/RMII BAT registers, and optional 4 KB backup SRAM 8- to 14-bit parallel camera interface 3 12-bit, 0.5 s ADCs with up to 24 channels (48 Mbyte/s max.) and up to 6 MSPS in triple interleaved mode Cryptographic acceleration 2 12-bit D/A converters Hardware acceleration for AES 128, 192, 256, Triple DES, HASH (MD5, SHA-1) General-purpose DMA: 16-stream controller with centralized FIFOs and burst support Analog true random number generator Up to 17 timers CRC calculation unit Up to twelve 16-bit and two 32-bit timers, 96-bit unique ID up to 120 MHz, each with up to 4 Table 1. Device summary IC/OC/PWM or pulse counter and Reference Part number quadrature (incremental) encoder input STM32F215RG, STM32F215VG, STM32F215ZG, STM32F215xx Debug mode: Serial wire debug (SWD), JTAG, STM32F215RE, STM32F215VE, STM32F215ZE and Cortex-M3 Embedded Trace Macrocell STM32F217VG, STM32F217IG, STM32F217ZG, STM32F217xx STM32F217VE, STM32F217IE, STM32F217ZE February 2016 DocID17050 Rev 11 1/179 This is information on a product in full production. www.st.comContents STM32F21xxx Contents 1 Introduction . 12 2 Description 13 2.1 Full compatibility throughout the family 16 3 Functional overview 19 3.1 ARM Cortex-M3 core with embedded Flash and SRAM . 19 3.2 Adaptive real-time memory accelerator (ART Accelerator) . 19 3.3 Memory protection unit . 19 3.4 Embedded Flash memory 20 3.5 CRC (cyclic redundancy check) calculation unit . 20 3.6 Embedded SRAM . 20 3.7 Multi-AHB bus matrix 20 3.8 DMA controller (DMA) . 21 3.9 Flexible static memory controller (FSMC) 22 3.10 Nested vectored interrupt controller (NVIC) . 22 3.11 External interrupt/event controller (EXTI) . 23 3.12 Clocks and startup 23 3.13 Boot modes . 23 3.14 Power supply schemes 24 3.15 Power supply supervisor . 24 3.16 Voltage regulator . 24 3.16.1 Regulator ON . 24 3.16.2 Regulator OFF 25 3.16.3 Regulator ON/OFF and internal reset ON/OFF availability 27 3.17 Real-time clock (RTC), backup SRAM and backup registers 28 3.18 Low-power modes 28 3.19 V operation . 29 BAT 3.20 Timers and watchdogs . 29 3.20.1 Advanced-control timers (TIM1, TIM8) . 30 3.20.2 General-purpose timers (TIMx) . 31 3.20.3 Basic timers TIM6 and TIM7 . 31 2/179 DocID17050 Rev 11