STM32F410x8 STM32F410xB ARM -Cortex -M4 32b MCU+FPU, 125 DMIPS, 128KB Flash, 32KB RAM, 9 TIMs, 1 ADC, 9 comm. interfaces Datasheet - production data Features Dynamic Efficiency Line with BAM (Batch Acquisition Mode) Core: ARM 32-bit Cortex -M4 CPU with WLCSP36 UFQFPN48 LQFP64 (10 10 mm) (7 7 mm) FPU, Adaptive real-time accelerator (ART (2.553 x 2.579 mm) Accelerator) allowing 0-wait state execution mode) from Flash memory, frequency up to 100 MHz, Three 16-bit general purpose timers memory protection unit, One 32-bit timer up to 100 MHz with up to 125 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), four IC/OC/PWM or pulse counter and and DSP instructions quadrature (incremental) encoder input Memories Two watchdog timers (independent Up to 128 Kbytes of Flash memory window) 512 bytes of OTP memory SysTick timer. 32 Kbytes of SRAM Debug mode Clock, reset and supply management Serial wire debug (SWD) & JTAG 1.7 V to 3.6 V application supply and I/Os interfaces POR, PDR, PVD and BOR Cortex -M4 Embedded Trace Macrocell 4-to-26 MHz crystal oscillator Up to 50 I/O ports with interrupt capability Internal 16 MHz factory-trimmed RC Up to 45 fast I/Os up to 100 MHz 32 kHz oscillator for RTC with calibration Up to 49 5 V-tolerant I/Os Internal 32 kHz RC with calibration Up to 9 communication interfaces Power consumption 2 Up to 3x I C interfaces (SMBus/PMBus) Run: 89 A/MHz (peripheral off) 2 including 1x I C Fast-mode at 1 MHz Stop (Flash in Stop mode, fast wakeup Up to 3 USARTs (2 x 12.5 Mbit/s, time): 40 A Typ 25 C 49 A max 1 x 6.25 Mbit/s), ISO 7816 interface, LIN, 25 C IrDA, modem control) Up to 3 SPI/I2Ss (up to 50 Mbit/s SPI or Stop (Flash in Deep power down mode, I2S audio protocol) fast wakeup time): down to 6 A 25 C True random number generator 14 A max 25 C Standby: 2.4 A 25 C / 1.7 V without CRC calculation unit RTC 12 A 85 C 1.7 V 96-bit unique ID V supply for RTC: 1 A 25 C BAT RTC: subsecond accuracy, hardware calendar 112-bit, 2.4 MSPS ADC: up to 16 channels All packages are ECOPACK 2 112-bit D/A converter Table 1. Device summary General-purpose DMA: 16-stream DMA Reference Part number controllers with FIFOs and burst support STM32F410T8, STM32F410C8, STM32F410x8 Up to 9 timers STM32F410R8 One 16-bit advanced motor-control timer STM32F410TB, STM32F410CB, STM32F410xB One low-power timer (available in Stop STM32F410RB September 2015 DocID028094 Rev 1 1/130 This is information on a product in full production. www.st.comContents STM32F410x8/B Contents 1 Introduction . 10 2 Description 11 2.1 Compatibility with STM32F4 series . 13 3 Functional overview 15 3.1 ARM Cortex -M4 with FPU core with embedded Flash and SRAM . 15 3.2 Adaptive real-time memory accelerator (ART Accelerator) . 15 3.3 Batch Acquisition mode (BAM) . 15 3.4 Memory protection unit . 16 3.5 Embedded Flash memory 16 3.6 CRC (cyclic redundancy check) calculation unit . 16 3.7 Embedded SRAM . 16 3.8 Multi-AHB bus matrix 16 3.9 DMA controller (DMA) . 17 3.10 Nested vectored interrupt controller (NVIC) . 18 3.11 External interrupt/event controller (EXTI) . 18 3.12 Clocks and startup 18 3.13 Boot modes . 18 3.14 Power supply schemes 19 3.15 Power supply supervisor . 20 3.15.1 Internal reset ON 20 3.15.2 Internal reset OFF . 20 3.16 Voltage regulator . 21 3.16.1 Internal power supply supervisor availability . 22 3.17 Real-time clock (RTC) and backup registers 22 3.18 Low-power modes 23 3.19 V operation . 23 BAT 3.20 Timers and watchdogs . 24 3.20.1 Advanced-control timers (TIM1) 25 3.20.2 General-purpose timers (TIM5, TIM9 and TIM11) . 25 3.20.3 Basic timer (TIM6) . 25 2/130 DocID028094 Rev 1