STM32F411xC STM32F411xE Arm Cortex -M4 32b MCU+FPU, 125 DMIPS, 512KB Flash, 128KB RAM, USB OTG FS, 11 TIMs, 1 ADC, 13 comm. interfaces Datasheet - production data Features )%* Dynamic Efficiency Line with BAM (Batch Acquisition Mode) 1.7 V to 3.6 V power supply WLCSP49 - 40C to 85/105/125 C temperature range LQFP100 UFQFPN48 UFBGA100 (2.999x3.185 mm) (14 14mm) (7 7 mm) Core: Arm 32-bit Cortex -M4 CPU with FPU, LQFP64 (7 7 mm) (10x10 mm) Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution Debug mode from Flash memory, frequency up to 100 MHz, Serial wire debug (SWD) & JTAG memory protection unit, interfaces 125 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), Cortex -M4 Embedded Trace Macrocell and DSP instructions Up to 81 I/O ports with interrupt capability Memories Up to 78 fast I/Os up to 100 MHz Up to 512 Kbytes of Flash memory Up to 77 5 V-tolerant I/Os 128 Kbytes of SRAM Up to 13 communication interfaces Clock, reset and supply management 2 Up to 3 x I C interfaces (SMBus/PMBus) 1.7 V to 3.6 V application supply and I/Os Up to 3 USARTs (2 x 12.5 Mbit/s, POR, PDR, PVD and BOR 1 x 6.25 Mbit/s), ISO 7816 interface, LIN, 4-to-26 MHz crystal oscillator IrDA, modem control) Internal 16 MHz factory-trimmed RC Up to 5 SPI/I2Ss (up to 50 Mbit/s, SPI or I2S audio protocol), SPI2 and SPI3 with 32 kHz oscillator for RTC with calibration 2 muxed full-duplex I S to achieve audio Internal 32 kHz RC with calibration class accuracy via internal audio PLL or Power consumption external clock Run: 100 A/MHz (peripheral off) SDIO interface (SD/MMC/eMMC) Stop (Flash in Stop mode, fast wakeup Advanced connectivity: USB 2.0 full-speed time): 42 A Typ 25C 65 A max device/host/OTG controller with on-chip 25 C PHY Stop (Flash in Deep power down mode, CRC calculation unit slow wakeup time): down to 9 A 25 C 96-bit unique ID 28 A max 25 C Standby: 1.8 A 25 C / 1.7 V without RTC: subsecond accuracy, hardware calendar RTC 11 A 85 C 1.7 V All packages (WLCSP49, LQFP64/100, V supply for RTC: 1 A 25 C BAT UFQFPN48, UFBGA100) are ECOPACK 2 112-bit, 2.4 MSPS A/D converter: up to 16 channels Table 1. Device summary General-purpose DMA: 16-stream DMA Reference Part number controllers with FIFOs and burst support STM32F411CC, STM32F411RC, Up to 11 timers: up to six 16-bit, two 32-bit STM32F411xC STM32F411VC timers up to 100 MHz, each with up to four IC/OC/PWM or pulse counter and quadrature STM32F411CE, STM32F411RE, STM32F411xE STM32F411VE (incremental) encoder input, two watchdog timers (independent and window) and a SysTick timer December 2017 DocID026289 Rev 7 1/149 This is information on a product in full production. www.st.comContents STM32F411xC STM32F411xE Contents 1 Introduction . 10 2 Description 11 2.1 Compatibility with STM32F4 Series . 13 3 Functional overview 16 3.1 Arm Cortex -M4 with FPU core with embedded Flash and SRAM 16 3.2 Adaptive real-time memory accelerator (ART Accelerator) . 16 3.3 Batch Acquisition mode (BAM) . 16 3.4 Memory protection unit . 17 3.5 Embedded Flash memory 17 3.6 CRC (cyclic redundancy check) calculation unit . 17 3.7 Embedded SRAM . 17 3.8 Multi-AHB bus matrix 18 3.9 DMA controller (DMA) . 18 3.10 Nested vectored interrupt controller (NVIC) . 19 3.11 External interrupt/event controller (EXTI) . 19 3.12 Clocks and startup 19 3.13 Boot modes . 20 3.14 Power supply schemes 20 3.15 Power supply supervisor . 21 3.15.1 Internal reset ON 21 3.15.2 Internal reset OFF . 21 3.16 Voltage regulator . 22 3.16.1 Regulator ON . 22 3.16.2 Regulator OFF 22 3.16.3 Regulator ON/OFF and internal power supply supervisor availability 25 3.17 Real-time clock (RTC) and backup registers 25 3.18 Low-power modes 26 3.19 V operation . 26 BAT 3.20 Timers and watchdogs . 27 3.20.1 Advanced-control timers (TIM1) 27 2/149 DocID026289 Rev 7