STM32F437xx STM32F439xx 32b Arm Cortex -M4 MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 com. interfaces, camera&LCD-TFT Datasheet - production data Features Core: Arm 32-bit Cortex -M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions LQFP100 (14 14 mm) UFBGA176 (10 x 10 mm) Memories WLCSP143 LQFP144 (20 20 mm) UFBGA169 (7 7 mm) LQFP176 (24 24 mm) Up to 2 MB of Flash memory organized into TFBGA216 (13 x 13 mm) LQFP208 (28 x 28 mm) two banks allowing read-while-write Up to 256+4 KB of SRAM including 64-KB Debug mode of CCM (core coupled memory) data RAM SWD & JTAG interfaces Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, Cortex-M4 Trace Macrocell SDRAM/LPSDR SDRAM, Compact Up to 168 I/O ports with interrupt capability Flash/NOR/NAND memories Up to 164 fast I/Os up to 90 MHz LCD parallel interface, 8080/6800 modes Up to 166 5 V-tolerant I/Os LCD-TFT controller with fully programmable Up to 21 communication interfaces resolution (total width up to 4096 pixels, total 2 Up to 3 I C interfaces (SMBus/PMBus) height up to 2048 lines and pixel clock up to Up to 4 USARTs/4 UARTs (11.25 Mbit/s, 83 MHz) ISO7816 interface, LIN, IrDA, modem Chrom-ART Accelerator for enhanced control) graphic content creation (DMA2D) Up to 6 SPIs (45 Mbits/s), 2 with muxed 2 full-duplex I S for audio class accuracy via Clock, reset and supply management internal audio PLL or external clock 1.7 V to 3.6 V application supply and I/Os 1 x SAI (serial audio interface) POR, PDR, PVD and BOR 2 CAN (2.0B Active) and SDIO interface 4-to-26 MHz crystal oscillator Advanced connectivity Internal 16 MHz factory-trimmed RC (1% USB 2.0 full-speed device/host/OTG accuracy) controller with on-chip PHY 32 kHz oscillator for RTC with calibration USB 2.0 high-speed/full-speed Internal 32 kHz RC with calibration device/host/OTG controller with dedicated Low power DMA, on-chip full-speed PHY and ULPI 10/100 Ethernet MAC with dedicated DMA: Sleep, Stop and Standby modes supports IEEE 1588v2 hardware, MII/RMII V supply for RTC, 2032 bit backup BAT registers + optional 4 KB backup SRAM 8- to 14-bit parallel camera interface up to 54 Mbytes/s 312-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode Cryptographic acceleration: hardware acceleration for AES 128, 192, 256, Triple 212-bit D/A converters DES, HASH (MD5, SHA-1, SHA-2), and HMAC General-purpose DMA: 16-stream DMA True random number generator controller with FIFOs and burst support CRC calculation unit Up to 17 timers: up to twelve 16-bit and two 32- bit timers up to 180 MHz, each with up to 4 RTC: subsecond accuracy, hardware calendar IC/OC/PWM or pulse counter and quadrature 96-bit unique ID (incremental) encoder input January 2018 DocID024244 Rev 11 1/241 This is information on a product in full production. www.st.comSTM32F437xx and STM32F439xx Table 1. Device summary Reference Part number STM32F437VG, STM32F437ZG, STM32F437IG, STM32F437VI, STM32F437ZI, STM32F437II, STM32F437xx STM32F437AI STM32F439VI, STM32F439VG, STM32F439ZG, STM32F439ZI, STM32F439IG, STM32F439II, STM32F439xx STM32F439BG, STM32F439BI, STM32F439NI, STM32F439AI, STM32F439NG 2/241 DocID024244 Rev 11