STM32F756xx ARM -based Cortex -M7 32b MCU+FPU, 462DMIPS, up to 1MB Flash/320+16+ 4KB RAM, crypto, USB OTG HS/FS, ethernet, 18 TIMs, 3 ADCs, 25 com itf, cam & LCD Datasheet - production data Features Core: ARM 32-bit Cortex -M7 CPU with FPU, LQFP100 (14x14 mm) adaptive real-time accelerator (ART UFBGA176 (10x10 mm) LQFP144 (20x20 mm) WLCSP143 Accelerator) and L1-cache: 4KB data cache TFBGA216 (13x13 mm) LQFP176 (24x24 mm) (4.5x5.8 mm) and 4KB instruction cache, allowing 0-wait TFBGA100 (8x8 mm) LQFP208 (28x28 mm) state execution from embedded Flash memory General-purpose DMA: 16-stream DMA and external memories, frequency up to controller with FIFOs and burst support 216 MHz, MPU, 462 DMIPS/2.14 DMIPS/MHz Debug mode (Dhrystone 2.1), and DSP instructions. SWD & JTAG interfaces Memories Cortex -M7 Trace Macrocell Up to 1MB of Flash memory Up to 168 I/O ports with interrupt capability 1024 bytes of OTP memory Up to 164 fast I/Os up to 108 MHz SRAM: 320KB (including 64KB of data Up to 166 5 V-tolerant I/Os TCM RAM for critical real-time data) + Up to 25 communication interfaces 16KB of instruction TCM RAM (for critical 2 real-time routines) + 4KB of backup SRAM Up to 4 I C interfaces (SMBus/PMBus) (available in the lowest power modes) Up to 4 USARTs/4 UARTs (27 Mbit/s, Flexible external memory controller with up ISO7816 interface, LIN, IrDA, modem to 32-bit data bus: SRAM, PSRAM, control) SDRAM/LPSDR SDRAM, NOR/NAND Up to 6 SPIs (up to 50 Mbit/s), 3 with 2 memories muxed simplex I S for audio class accuracy via internal audio PLL or external Dual mode Quad-SPI clock LCD parallel interface, 8080/6800 modes 2 x SAIs (serial audio interface) LCD-TFT controller up to XGA resolution with 2 CANs (2.0B active) and SDMMC dedicated Chrom-ART Accelerator for interface enhanced graphic content creation (DMA2D) SPDIFRX interface Clock, reset and supply management HDMI-CEC 1.7 V to 3.6 V application supply and I/Os Advanced connectivity POR, PDR, PVD and BOR USB 2.0 full-speed device/host/OTG Dedicated USB power controller with on-chip PHY 4-to-26 MHz crystal oscillator USB 2.0 high-speed/full-speed Internal 16 MHz factory-trimmed RC (1% device/host/OTG controller with dedicated accuracy) DMA, on-chip full-speed PHY and ULPI 32 kHz oscillator for RTC with calibration 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII Internal 32 kHz RC with calibration 8- to 14-bit parallel camera interface up to Low-power 54 Mbyte/s Sleep, Stop and Standby modes Cryptographic acceleration: hardware V supply for RTC, 3232 bit backup BAT acceleration for AES 128, 192, 256, triple DES, registers + 4KB backup SRAM HASH (MD5, SHA-1, SHA-2), and HMAC 312-bit, 2.4 MSPS ADC: up to 24 channels True random number generator and 7.2 MSPS in triple interleaved mode CRC calculation unit 212-bit D/A converters RTC: subsecond accuracy, hardware calendar Up to 18 timers: up to thirteen 16-bit (1x low- 96-bit unique ID power 16-bit timer available in Stop mode) and Table 1. Device summary two 32-bit timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature Reference Part number (incremental) encoder input. All 15 timers running up to 216 MHz. 2x watchdogs, SysTick STM32F756VG, STM32F756ZG, STM32F756IG, STM32F756xx STM32F756BG, STM32F756NG timer February 2016 DocID027589 Rev 4 1/228 This is information on a product in full production. www.st.comContents STM32F756xx Contents 1 Description 12 1.1 Full compatibility throughout the family 15 2 Functional overview 17 2.1 ARM Cortex -M7 with FPU 17 2.2 Memory protection unit . 17 2.3 Embedded Flash memory 18 2.4 CRC (cyclic redundancy check) calculation unit . 18 2.5 Embedded SRAM . 18 2.6 AXI-AHB bus matrix . 18 2.7 DMA controller (DMA) . 19 2.8 Flexible memory controller (FMC) 20 2.9 Quad-SPI memory interface (QUADSPI) . 21 2.10 LCD-TFT controller 21 2.11 Chrom-ART Accelerator (DMA2D) 21 2.12 Nested vectored interrupt controller (NVIC) . 22 2.13 External interrupt/event controller (EXTI) . 22 2.14 Clocks and startup 22 2.15 Boot modes . 23 2.16 Power supply schemes 23 2.17 Power supply supervisor . 24 2.17.1 Internal reset ON 24 2.17.2 Internal reset OFF . 25 2.18 Voltage regulator . 26 2.18.1 Regulator ON . 26 2.18.2 Regulator OFF 27 2.18.3 Regulator ON/OFF and internal reset ON/OFF availability 30 2.19 Real-time clock (RTC), backup SRAM and backup registers 30 2.20 Low-power modes 31 2.21 V operation . 32 BAT 2.22 Timers and watchdogs . 32 2.22.1 Advanced-control timers (TIM1, TIM8) . 34 2/228 DocID027589 Rev 4