STM32G0B1xB/xC/xE Arm Cortex -M0+ 32-bit MCU, up to 512KB Flash, 144KB RAM, 6x USART, timers, ADC, DAC, comm. I/Fs, 1.7-3.6V Datasheet - production data Features Core: Arm 32-bit Cortex -M0+ CPU, frequency up to 64 MHz LQFP32 UFQFPN32 WLCSP52 UFBGA64 7 7mm 55mm -40C to 85C/105C/125C operating 3.09 3.15 mm 5 5mm UFQFPN48 LQFP48 temperature UFBGA100 77mm 7 7mm 7 7mm LQFP64 Memories 10 10 mm Up to 512 Kbytes of Flash memory with LQFP80 12 12 mm protection and securable area, two banks, LQFP100 read-while-write support 14 14 mm 144 Kbytes of SRAM (128 Kbytes with HW Communication interfaces parity check) 2 Three I C-bus interfaces supporting Fast- CRC calculation unit mode Plus (1 Mbit/s) with extra current Reset and power management sink, two supporting SMBus/PMBus and wakeup from Stop mode Voltage range: 1.7 V to 3.6 V Six USARTs with master/slave Separate I/O supply pin (1.6 V to 3.6 V) synchronous SPI three supporting Power-on/Power-down reset (POR/PDR) ISO7816 interface, LIN, IrDA capability, Programmable Brownout reset (BOR) auto baud rate detection and wakeup Programmable voltage detector (PVD) feature Low-power modes: Two low-power UARTs Sleep, Stop, Standby, Shutdown Three SPIs (32 Mbit/s) with 4- to 16-bit V supply for RTC and backup registers BAT programmable bitframe, two multiplexed 2 Clock management with I S interface 4 to 48 MHz crystal oscillator HDMI CEC interface, wakeup on header 32 kHz crystal oscillator with calibration USB 2.0 FS device (crystal-less) and host Internal 16 MHz RC with PLL option (1 %) controller Internal 32 kHz RC oscillator (5 %) USB Type-C Power Delivery controller Up to 94 fast I/Os Two FDCAN controllers All mappable on external interrupt vectors Development support: serial wire debug (SWD) Multiple 5 V-tolerant I/Os 96-bit unique ID 12-channel DMA controller with flexible mapping All packages ECOPACK 2 compliant 12-bit, 0.4 s ADC (up to 16 ext. channels) Up to 16-bit with hardware oversampling Table 1. Device summary Conversion range: 0 to 3.6V Reference Part number Two 12-bit DACs, low-power sample-and-hold STM32G0B1CB, STM32G0B1KB, Three fast low-power analog comparators, with STM32G0B1xB STM32G0B1MB, STM32G0B1RB, programmable input and output, rail-to-rail STM32G0B1VB 15 timers (two 128 MHz capable): 16-bit for STM32G0B1CC, STM32G0B1KC, advanced motor control, one 32-bit and six 16- STM32G0B1xC STM32G0B1MC, STM32G0B1RC, bit general-purpose, two basic 16-bit, two low- STM32G0B1VC power 16-bit, two watchdogs, SysTick timer Calendar RTC with alarm and periodic wakeup STM32G0B1CE, STM32G0B1KE, from Stop/Standby/Shutdown STM32G0B1xE STM32G0B1ME, STM32G0B1NE, STM32G0B1RE, STM32G0B1VE November 2021 DS13560 Rev 2 1/159 This is information on a product in full production. www.st.comContents STM32G0B1xB/xC/xE Contents 1 Introduction . 10 2 Description 11 3 Functional overview 14 3.1 Arm Cortex -M0+ core with MPU . 14 3.2 Memory protection unit . 14 3.3 Embedded Flash memory 14 3.3.1 Securable area . 15 3.4 Embedded SRAM . 16 3.5 Boot modes . 16 3.6 Cyclic redundancy check calculation unit (CRC) . 16 3.7 Power supply management . 17 3.7.1 Power supply schemes . 17 3.7.2 Power supply supervisor 18 3.7.3 Voltage regulator 18 3.7.4 Low-power modes . 19 3.7.5 Reset mode 20 3.7.6 VBAT operation . 20 3.8 Interconnect of peripherals 20 3.9 Clocks and startup 22 3.10 General-purpose inputs/outputs (GPIOs) . 23 3.11 Direct memory access controller (DMA) 23 3.12 DMA request multiplexer (DMAMUX) 23 3.13 Interrupts and events 24 3.13.1 Nested vectored interrupt controller (NVIC) 24 3.13.2 Extended interrupt/event controller (EXTI) 24 3.14 Analog-to-digital converter (ADC) 25 3.14.1 Temperature sensor 25 3.14.2 Internal voltage reference (V ) . 26 REFINT 3.14.3 V battery voltage monitoring . 26 BAT 3.15 Digital-to-analog converter (DAC) 26 3.16 Voltage reference buffer (VREFBUF) 27 2/159 DS13560 Rev 2