STM32G483xE Arm Cortex -M4 32-bit MCU+FPU, up to 512 KB Flash, 170 MHz / 213 DMIPS, 128 KB SRAM, rich analog, math accelerator, AES Datasheet - production data Features Includes ST state-of-the-art patented technology LQFP48 (7 x 7 mm) WLCSP81 UFQFPN48 (4.02 x 4.27 mm) Core: Arm 32-bit Cortex -M4 CPU with FPU, LQFP64 (10 x 10 mm) (7 x 7 mm) LQFP80 (12 x 12 mm) Adaptive real-time accelerator (ART LQFP100 (14 x 14 mm) Accelerator) allowing 0-wait-state execution LQFP128 (14 x 14 mm) from Flash memory, frequency up to 170 MHz with 213 DMIPS, MPU, DSP instructions UFBGA121 TFBGA100 (6 x 6 mm) (8 x 8 mm) Operating conditions: V , V voltage range: DD DDA Clock management 1.71 V to 3.6 V 4 to 48 MHz crystal oscillator Mathematical hardware accelerators 32 kHz oscillator with calibration CORDIC for trigonometric functions Internal 16 MHz RC with PLL option ( 1%) acceleration Internal 32 kHz RC oscillator ( 5%) FMAC: filter mathematical accelerator Up to 107 fast I/Os Memories All mappable on external interrupt vectors 512 Kbytes of Flash memory with ECC Several I/Os with 5 V tolerant capability support, two banks read-while-write, Interconnect matrix proprietary code readout protection (PCROP), securable memory area, 1 Kbyte 16-channel DMA controller OTP 5 x 12-bit ADCs 0.25 s, up to 42 channels. 96 Kbytes of SRAM, with hardware parity Resolution up to 16-bit with hardware check implemented on the first 32 Kbytes oversampling, 0 to 3.6 V conversion range Routine booster: 32 Kbytes of SRAM on 7 x 12-bit DAC channels instruction and data bus, with hardware 3 x buffered external channels 1 MSPS parity check (CCM SRAM) 4 x unbuffered internal channels 15 MSPS External memory interface for static 7 x ultra-fast rail-to-rail analog comparators memories FSMC supporting SRAM, PSRAM, NOR and NAND memories 6 x operational amplifiers that can be used in Quad-SPI memory interface PGA mode, all terminals accessible Reset and supply management Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, Power-on/power-down reset 2.5 V, 2.9 V) (POR/PDR/BOR) Programmable voltage detector (PVD) 17 timers: Low-power modes: sleep, stop, standby 2 x 32-bit timer and 2 x 16-bit timers with and shutdown up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input V supply for RTC and backup registers BAT 3 x 16-bit 8-channel advanced motor control timers, with up to 8 x PWM November 2021 DS12997 Rev 4 1/230 This is information on a product in full production. www.st.comSTM32G483xE channels, dead time generation and 5 x USART/UARTs (ISO 7816 interface, emergency stop LIN, IrDA, modem control) 1 x 16-bit timer with 2 x IC/OCs, one 1 x LPUART OCN/PWM, dead time generation and 4 x SPIs, 4 to 16 programmable bit frames, 2 emergency stop 2 x with multiplexed half duplex I S 2 x 16-bit timers with IC/OC/OCN/PWM, interface dead time generation and emergency stop 1 x SAI (serial audio interface) 2 x watchdog timers (independent, window) USB 2.0 full-speed interface with LPM and 1 x SysTick timer: 24-bit downcounter BCD support 2 x 16-bit basic timers IRTIM (infrared interface) 1 x low-power timer USB Type-C /USB power delivery controller (UCPD) Calendar RTC with alarm, periodic wakeup from stop/standby True random number generator (RNG) Communication interfaces CRC calculation unit, 96-bit unique ID 3 x FDCAN controller supporting flexible AES: 128/256-bit key encryption hardware data rate accelerator 2 4 x I C Fast mode plus (1 Mbit/s) with Development support: serial wire debug 20 mA current sink, SMBus/PMBus, (SWD), JTAG, Embedded Trace Macrocell wakeup from stop Table 1. Device summary Reference Part number STM32G483CE, STM32G483RE, STM32G483ME, STM32G483xE STM32G483PE, STM32G483VE, STM32G483QE 2/230 DS12997 Rev 4