STM32L031x4 STM32L031x6 Access line ultra-low-power 32-bit MCU Arm -based Cortex -M0+, up to 32KB Flash, 8KB SRAM, 1KB EEPROM, ADC Datasheet - production data Features Ultra-low-power platform 1.65 V to 3.6 V power supply WLCSP25 -40 to 125 C temperature range TSSOP20 UFQFPN28 4x4 mm LQFP32/48 2.097x2.493 mm 169 mils UFQFPN32 5x5 mm 7x7 mm 0.23 A Standby mode (2 wakeup pins) UFQFPN48 7x7 mm 0.35 A Stop mode (16 wakeup lines) 0.6 A Stop mode + RTC + 8 KB RAM retention Rich Analog peripherals Down to 76 A/MHz in Run mode 12-bit ADC 1.14 Msps up to 10 channels (down 5 s wakeup time (from Flash memory) to 1.65 V) 41A 12-bit ADC conversion at 10 ksps 2x ultra-low-power comparators (window mode Core: Arm 32-bit Cortex -M0+ and wake up capability, down to 1.65 V) From 32 kHz up to 32 MHz max. 7-channel DMA controller, supporting ADC, SPI, 0.95 DMIPS/MHz I2C, USART, Timers Reset and supply management 5x peripherals communication interface Ultra-safe, low-power BOR (brownout reset) 1x USART (ISO 7816, IrDA), 1x UART (low power) with 5 selectable thresholds Ultralow power POR/PDR Up to 2 SPI interfaces, up to 16 Mbits/s Programmable voltage detector (PVD) 1x I2C (SMBus/PMBus) Clock sources 8x timers: 1x 16-bit with up to 4 channels, 2x 16-bit 1 to 25 MHz crystal oscillator with up to 2 channels, 1x 16-bit ultra-low-power 32 kHz oscillator for RTC with calibration timer, 1x SysTick, 1x RTC and 2x watchdogs High speed internal 16 MHz factory-trimmed RC (independent/window) (+/- 1%) CRC calculation unit, 96-bit unique ID Internal low-power 37 kHz RC All packages are ECOPACK 2 Internal multispeed low-power 65 kHz to 4.2 MHz RC Table 1. Device summary PLL for CPU clock Reference Part number Pre-programmed bootloader USART, SPI supported STM32L031G4, STM32L031K4, Development support STM32L031x4 STM32L031C4, STM32L031E4, Serial wire debug supported STM32L031F4 Up to 38 fast I/Os (31 I/Os 5V tolerant) STM32L031G6, STM32L031K6, STM32L031x6 STM32L031C6, STM32L031E6, Memories STM32L031F6 Up to 32-Kbyte Flash with ECC 8-Kbyte RAM 1-Kbyte of data EEPROM with ECC 20-byte backup register Sector protection against R/W operation March 2018 DS10668 Rev 6 1/126 This is information on a product in full production. www.st.comContents STM32L031x4/6 Contents 1 Introduction 9 2 Description 10 2.1 Device overview .11 2.2 Ultra-low-power device continuum 14 3 Functional overview 15 3.1 Low-power modes 15 3.2 Interconnect matrix 19 3.3 Arm Cortex -M0+ core 20 3.4 Reset and supply management 21 3.4.1 Power supply schemes . 21 3.4.2 Power supply supervisor 21 3.4.3 Voltage regulator 22 3.4.4 Boot modes 22 3.5 Clock management . 23 3.6 Low-power real-time clock and backup registers . 25 3.7 General-purpose inputs/outputs (GPIOs) . 25 3.8 Extended interrupt/event controller (EXTI) 26 3.9 Memories . 26 3.10 Direct memory access (DMA) . 26 3.11 Analog-to-digital converter (ADC) 27 3.12 Temperature sensor . 27 3.12.1 Internal voltage reference (V ) . 28 REFINT 3.13 Ultra-low-power comparators and reference voltage 28 3.14 System configuration controller 28 3.15 Timers and watchdogs . 29 3.15.1 General-purpose timers (TIM2, TIM21 and TIM22) 29 3.15.2 Low-power timer (LPTIM) . 30 3.15.3 SysTick timer . 30 3.15.4 Independent watchdog (IWDG) . 30 3.15.5 Window watchdog (WWDG) . 30 2/126 DS10668 Rev 6