STM32L071x8 STM32L071xB STM32L071xZ Access line ultra-low-power 32-bit MCU Arm -based Cortex -M0+, up to 192KB Flash, 20KB SRAM, 6KB EEPROM, ADC Datasheet - production data Features FBGA FBGA Ultra-low-power platform 1.65 V to 3.6 V power supply UFQFxPN32 UFBGA100 UFBGA64 -40 to 125 C temperature range LQFP32 (7x7 mm) (5x5 mm) (7x7 mm) TFBGA64 LQFP48 (7x7 mm) UFQFPN48 0.29 A Standby mode (3 wakeup pins) (5x5mm) LQFP64 (10x10 mm) (7x7 mm) 0.43 A Stop mode (16 wakeup lines) LQFP100 (14x14 mm) 0.86 A Stop mode + RTC + 20-Kbyte RAM retention Down to 93 A/MHz in Run mode WLCSP49 5 s wakeup time (from Flash memory) (3.294x3.258 mm) 41 A 12-bit ADC conversion at 10 ksps Rich Analog peripherals Core: Arm 32-bit Cortex -M0+ with MPU 12-bit ADC 1.14 Msps up to 16 channels (down From 32 kHz up to 32 MHz max. to 1.65 V) 0.95 DMIPS/MHz 2x ultra-low-power comparators (window mode Memories and wake up capability, down to 1.65 V) Up to 192-Kbyte Flash memory with ECC(2 7-channel DMA controller, supporting ADC, SPI, banks with read-while-write capability) I2C, USART, Timers 20 -Kbyte RAM Up to 10x peripheral communication interfaces 6 Kbytes of data EEPROM with ECC 4x USART (2 with ISO 7816, IrDA), 1x UART 20-byte backup register (low power) Sector protection against R/W operation Up to 6x SPI 16 Mbits/s Up to 84 fast I/Os (78 I/Os 5V tolerant) 3x I2C (2 with SMBus/PMBus) Reset and supply management 11x timers: 2x 16-bit with up to 4 channels, 2x 16-bit Ultra-safe, low-power BOR (brownout reset) with up to 2 channels, 1x 16-bit ultra-low-power with 5 selectable thresholds timer, 1x SysTick, 1x RTC, 2x 16-bit basic, and 2x Ultra-low-power POR/PDR watchdogs (independent/window) Programmable voltage detector (PVD) CRC calculation unit, 96-bit unique ID Clock sources All packages are ECOPACK2 1 to 25 MHz crystal oscillator Table 1. Device summary 32 kHz oscillator for RTC with calibration Reference Part number High speed internal 16 MHz factory-trimmed RC (+/- 1%) STM32L071V8, STM32L071K8, Internal low-power 37 kHz RC STM32L071x8 STM32L071C8 Internal multispeed low-power 65 kHz to 4.2 MHz RC STM32L071VB, STM32L071RB, STM32L071xB PLL for CPU clock STM32L071CB, STM32L071KB Pre-programmed bootloader STM32L071VZ, STM32L071RZ, STM32L071xZ USART, I2C, SPI supported STM32L071CZ, STM32L071KZ Development support Serial wire debug supported November 2019 DS10690 Rev 7 1/148 This is information on a product in full production. www.st.comContents STM32L071xx Contents 1 Introduction . 10 2 Description 11 2.1 Device overview 12 2.2 Ultra-low-power device continuum 14 3 Functional overview 15 3.1 Low-power modes 15 3.2 Interconnect matrix 19 3.3 Arm Cortex-M0+ core with MPU . 20 3.4 Reset and supply management 21 3.4.1 Power supply schemes . 21 3.4.2 Power supply supervisor 21 3.4.3 Voltage regulator 22 3.5 Clock management . 22 3.6 Low-power real-time clock and backup registers . 25 3.7 General-purpose inputs/outputs (GPIOs) . 25 3.8 Memories . 26 3.9 Boot modes . 26 3.10 Direct memory access (DMA) . 27 3.11 Analog-to-digital converter (ADC) 27 3.12 Temperature sensor . 27 3.12.1 Internal voltage reference (V ) . 28 REFINT 3.13 Ultra-low-power comparators and reference voltage 28 3.14 Timers and watchdogs . 29 3.14.1 General-purpose timers (TIM2, TIM3, TIM21 and TIM22) . 29 3.14.2 Low-power Timer (LPTIM) . 30 3.14.3 Basic timer (TIM6, TIM7) 30 3.14.4 SysTick timer . 30 3.14.5 Independent watchdog (IWDG) . 30 3.14.6 Window watchdog (WWDG) . 30 3.15 Communication interfaces 31 2/148 DS10690 Rev 7