STM32WB50CG STM32WB30CE Multiprotocol wireless 32-bit MCU Arm -based Cortex -M4 with FPU, Bluetooth 5.2 or 802.15.4 radio solution Datasheet - production data Features Includes ST state-of-the-art patented technology Radio UFQFPN48 2.4 GHz 7 x 7 mm RF transceiver supporting Bluetooth 5.2 solder pad specification or IEEE 802.15.4-2011 PHY and MAC, supporting Thread and Core: Arm 32-bit Cortex -M4 CPU with FPU, Zigbee 3.0 adaptive real-time accelerator (ART RX sensitivity: -96 dBm (Bluetooth Low Accelerator) allowing 0-wait-state execution Energy at 1 Mbps), -100 dBm (802.15.4) from Flash memory, frequency up to 64 MHz, MPU, 80 DMIPS and DSP instructions Programmable output power up to +4 dBm with 1 dB steps Performance benchmark Integrated balun to reduce BOM 1.25 DMIPS/MHz (Drystone 2.1) Support for 1 Mbps 219.48 CoreMark (3.43 CoreMark/MHz at Dedicated Arm 32-bit Cortex M0+ CPU 64 MHz) for real-time Radio layer Energy benckmark Accurate RSSI to enable power control 303 ULPMark CP score Suitable for systems requiring compliance Supply and reset management with radio frequency regulations ETSI EN Ultra-safe, low-power BOR (brownout 300 328, EN 300 440, FCC CFR47 Part 15 reset) with five selectable thresholds and ARIB STD-T66 Ultra-low-power POR/PDR Support for external PA Programmable voltage detector (PVD) Available integrated passive device (IPD) V mode with RTC and backup registers companion chip for optimized matching BAT solution (MLPF-WB-01E3) Clock sources Ultra-low-power platform 32 MHz crystal oscillator with integrated trimming capacitors (Radio and CPU clock) 2.0 to 3.6 V power supply 32 kHz crystal oscillator for RTC (LSE) 10 C to +85 C temperature range Internal low-power 32 kHz (5%) RC (LSI1) 14 nA shutdown mode Internal low-power 32 kHz (stability 700 nA Standby mode + RTC + 32 KB 500 ppm) RC (LSI2) RAM Internal multispeed 100 kHz to 48 MHz 2.25 A Stop mode + RTC + 128 KB RAM oscillator, auto-trimmed by LSE (better than Radio: Rx 7.9 mA / Tx at 0 dBm 8.8 mA 0.25% accuracy) High speed internal 16 MHz factory trimmed RC (1%) 1x PLL for system clock and ADC April 2021 DS13047 Rev 5 1/119 This is information on a product in full production. www.st.comSTM32WB50CG STM32WB30CE Memories Security and ID 1 MB Flash memory with sector protection Secure firmware installation (SFI) for (PCROP) against R/W operations, enabling Bluetooth Low Energy and 802.15.4 SW radio stack and application stack 128 KB SRAM, including 64 KB with 2x hardware encryption AES maximum hardware parity check 256-bit for the application, the Bluetooth Low Energy and IEEE802.15.4 20x32-bit backup register Customer key storage / key manager Boot loader supporting USART, SPI, I2C services interfaces HW public key authority (PKA) OTA (over the air) Bluetooth Low Energy and 802.15.4 update Cryptographic algorithms: RSA, Diffie-Helman, ECC over GF(p) 1 Kbyte (128 double words) OTP True random number generator (RNG) Rich analog peripherals (down to 2.0 V) Sector protection against R/W operation 12-bit ADC 2.13 Msps, up to 16-bit with (PCROP) hardware oversampling, 200 A/Msps CRC calculation unit System peripherals Die information: 96-bit unique ID Inter processor communication controller IEEE 64-bit unique ID. Possibility to derive (IPCC) for communication with Bluetooth 802.15.4 64-bit and Bluetooth Low Energy Low Energy and 802.15.4 48-bit EUI HW semaphores for resources sharing Up to 30 fast I/Os, 28 of them 5 V-tolerant between CPUs 1x DMA controller (7x channels) supporting Development support ADC, SPI, I2C, USART, AES, timers Serial wire debug (SWD), JTAG for the 1x USART (ISO 7816, IrDA, SPI Master, application processor Modbus and Smartcard mode) Application cross trigger 1x SPI 32 Mbit/s Package is ECOPACK2 compliant 1x I2C (SMBus/PMBus) 1x 16-bit, four channels advanced timer 2x 16-bit, two channels timer 1x 32-bit, four channels timer 2x 16-bit ultra-low-power timer 1x independent Systick 1x independent watchdog 1x window watchdog 2/119 DS13047 Rev 5