TS4604IPT STMicroelectronics

TS4604 Stereo headset driver and analog audio line driver with integrated reference to ground Features TSSOP28 Operating from V = 3 V up to 4.8 V single CC supply operation Line driver stereo differential inputs External gain setting resistors Space-saving package: TSSOP28 pitch 0.65 mm Dedicated shutdown control per function 100 mW headset drive into a 16 load 90 dB high PSRR on headset drive Pin connections (top view) Two internal negative supplies to ensure ground-referenced, headset and line driver capless outputs +LDL 1 28 +LDR Internal undervoltage mute -LDL 2 27 -LDR OUTLDL 3 26 OUTLDR Line driver 2 Vrms typ. Output voltage across 4 25 AGND EUVP entire supply voltage range ENLD 5 24 PGND Pop-&-click reduction circuitry, thermal 6 23 PVSSLD PVCCLD shutdown and output short-circuit protection 7 22 CNLD CPLD 8 21 CNHP CPHP 9 20 Applications PVSSHP PVCCHP 10 19 ENHP PGND PDP/LCD TV 11 18 AGND NC 17 OUTHPL 12 Set-top boxes OUTHPR -HPL 13 16 -HPR +HPL 14 15 +HPR Description The TS4604 is a stereo ground-referenced output analog line driver and stereo headset driver whose design allows the output DC-blocking capacitors to be removed, thus reducing component count. The TS4604 drives 2 Vrms into a 5 k load or more. The device has differential inputs and uses external gain setting resistors. The TS4604 delivers up to 100 mW per channel into a 16 load. All outputs of the TS4604 include 8 kV human body model ESD protection cells. October 2010 Doc ID 17913 Rev 1 1/31 www.st.com 31 Obsolete Product(s) - Obsolete Product(s)Contents TS4604 Contents 1 Absolute maximum ratings and operating conditions . 3 2 Typical application 4 3 Electrical characteristics . 6 4 Characteristics of the line driver . 9 5 Characteristics of the headset driver 11 6 Application information . 17 6.1 General description . 17 6.2 Use of ceramic capacitors 18 6.3 Flying and tank capacitor for the internal negative supply 18 6.4 Power supply decoupling capacitor (Cs) . 18 6.5 Input coupling capacitor (Cin) 19 6.6 Range of the gain setting resistors 19 6.7 Performance of CMRR . 21 6.8 Internal and external undervoltage detection 21 6.8.1 Internal UVLO 21 6.8.2 External UVLO 21 6.9 2nd order Butterworth low-pass filter 23 6.10 ESD protection and compliance 24 6.11 Pop-&-click circuitry . 25 6.12 Start-up phase . 25 6.13 Layout recommendations . 26 7 Package information 27 7.1 TSSOP28 package 28 8 Ordering information . 29 9 Revision history . 30 2/31 Doc ID 17913 Rev 1 Obsolete Product(s) - Obsolete Product(s)