TS34063CS Taiwan Semiconductor Inverting Regulator Buck, Boost, Switching DESCRIPTION FEATURES Power forward control circuit TS34063 is a monolithic switching regulator and Operating voltage from 3V to 40V subsystem intended for use as DC-to-DC converter. It Low standby current consist of an internal temperature compensated Current limit adjustable reference, comparator, controlled duty cycle oscillator Output switch current up to 1.5A with an active peak current limit circuit, driver and high Variable oscillator frequency up to 100kHz (max.) current output switch. The TS34063 is specifically Output voltage adjustable designed to be incorporated in Step-Up, Step-Down and RoHS Compliant Voltage-Inverting applications with minimum number of Halogen-free according to IEC 61249-2-21 external components. APPLICATION Charger xD-ROM, xDSL products DC to DC converter SOP-8 Pin Definition: 1. Switch Collector 5. Comparator Inverting Input 2. Switch Emitter 6. VCC 3. Timing Capacitor 7. Ipk 4. GND 8. Driver Collector Note: MSL 3 (Moisture Sensitivity Level) per J-STD-020 TYPICAL APPLICATION CIRCUIT Step-Up Converter 1 Version: C2103 TS34063CS Taiwan Semiconductor (Note 1) ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL LIMIT UNIT Supply Voltage V 40 V CC Comparator Input Voltage Range VFB -0.3 ~ 40 V Switch Collector Output Voltage V 40 V C(SW) Switch Emitter Voltage VE(SW) 40 mA Switch Collector to Emitter Voltage V 40 mW CE(SW) Driver Collector Voltage VC(DRIVER) 40 C Driver Collector Current (note 1) I 100 V C(DRIVER) Output Switching Current ISW 1.5 A Power Dissipation P 0.5 W D o Operating Ambient Temperature Range TOPR -40 ~ +85 C o Junction Temperature Range T 0 ~ +125 C J o Storage Temperature Range TSTG -65 ~ +150 C ELECTRICAL SPECIFICATIONS (V = 5V, T = 25C unless otherwise noted) CC A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Oscillator Frequency FOSC C = 1nF, Vpin5= 0V 24 33 42 kHz T I Charge Current CHARGE VCC = 5V ~ 40V 24 30 42 A Discharge Current IDISCHARGE VCC = 5V ~ 40V 140 200 260 A Discharge to Charge current IDISCHARGE / Pin7 to V 5.2 6.5 7.5 -- CC ratio ICHARGE Current Limit Sense Voltage VIPK(SENSE) IDISCHARGE = ICHARGE 250 -- 350 mV (note1) Output switch I = 1A, SW Saturation Voltage VCE(SAT) -- 1.0 1.3 V Pin1, 8 connected Saturation Voltage V I = 1A, I =50mA -- 0.45 0.7 V CE(SAT) SW D DC current gain H I = 1A, V = 0.5V 50 75 -- -- FE SW CE Collector off-state current I V = 40V C(OFF) CE -- 0.01 100 A Comparator Threshold Voltage V 1.225 1.25 1.275 V REF Line regulation REGLINE VCC = 3V ~ 40V -- -- 6 mV Total device VCC = 5V ~ 40V, CT = 1nF, pin7= V , CC Supply Current ICC -- 3 5 mA pin5> V , pin2=Gnd, TH remaining pins open Note: 1. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. 2. If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents (300mA) and high driver currents (30mA), it may take up to 2s for it to come out of saturation. This condition will shorten the off time at frequencies 30kHz and is magnified at high temperature. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a Non-Darlington configuration is used, the following output drive condition is recommended: Forced Bata of output switch: I output / (I driver 7mA*) 10 C C * The 100ohm resistor in the emitter of the driver divide requires about 7mA before the output switch conducts. 2 Version: C2103