DATASHEET HIGH-PERFORMANCE 6-CHANNEL AC97 STAC9758/9759 2.3 CODEC WITH UNIVERSAL JACKS OVERVIEW DESCRIPTION High performance, 6-channel, AC97 2.3 CODECs with IDT s STAC9758/9759 are general purpose 20-bit, full high Signal-to-Noise ratio and low distortion. duplex, 6-Channel audio CODECs conforming to the ana- log component specification of AC 97 (Audio Codec 97 FEATURES Component Specification Rev. 2.3). The STAC9758/9759 incorporates IDT s proprietary technology to achieve a High performance technology DAC SNR in excess of 90dB. With IDTs headphone drive 6-Channel AC97 2.3 CODECs capability, headphones can be driven without an external amplifier. The STAC9758/9759 communicates via the five 20-bit full duplex stereo ADCs AC-Link to any digital component of AC 97, providing flexi- 20-bit full duplex DACs bility in the audio system design. Packaged in an AC 97 Headphone drive capability compliant 48-pin TQFP, the STAC9758/9759 can be placed on the motherboard, daughter boards, PCI, AMR, SPDIF IN Support CNR, MDC or ACR cards. SPDIF OUT Support, including 96 kHz Supported ADC and DAC audio sample rates include ADAT Optical Litepipe Interface 96kHz, 48kHz, 44.1kHz, 32kHz, 22.05kHz, 16kHz, Support 11.025kHz, and 8 kHz additional rates are supported in TM Universal Jacks Functionality for jack the STAC9758/9759 soft audio drivers. All ADCs and interchangeability DACs operate at 20-bit resolution. SPDIF OUT supported Internal Jack Sensing sample rates include 96kHz, 48kHz, 44.1kHz and 32kHz. SPDIF IN supports 48kHz and 44.1kHz. Crystal Elimination Circuit The STAC9758/9759 includes internal jack sensing using Front/Rear Stereo Microphone proprietary IDT current and impedance-sensing tech- 96 kHz DAC Playback support niques. The impedance load on any of the inputs or outputs Up to 5 General Purpose I/Os can be detected. The STAC9758/9759 also supports Uni- TM versal Jacks functionality for jack interchangeability. Digital and Analog PC BEEP The GPIOs on the STAC9758/9759 remain available for AC97 2.3 Paging Registers and Analog Plug and advanced configurations. The STAC9758/9759 can sup- Play Capability port up to 5 GPIOs. Energy saving dynamic power modes The STAC9758/9759 is designed primarily to support >90 dB SNR and >-90dBV THD+N 6-channel audio. Additionally, the STAC9758/9759 pro- Adjustable VREF OUT Control vides for a stereo enhancement feature, IDT Surround 3D (SS3D). Pin compatible with 2-Channel CODECs Independent sample rates for ADC & DACs The STAC9758/9759 also supports the ADAT Optical Litepipe Interface, which provides an 8 channel output for +3.3 V & +5 V analog power supply options professional and consumer audio applications. The STAC9758/9759 can be SoundBlaster and Windows Sound System compatible when used with IDTs WDM driver for Windows 98/2K/ME/XP or with Intel/Microsoft driver included with Windows 2K/ME/XP. SoundBlaster is a registered trademark of Creative Labs. Windows is a registered trademark of Microsoft Corporation. ADAT Optical is a registered trademark of Alesis Corporation. IDT 1 STAC9758/9759 V 1.2 1206 HIGH-PERFORMANCE 6-CHANNEL AC97 2.3 CODEC WITH UNIVERSAL JACKSSTAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC97 2.3 CODEC WITH UNIVERSAL JACKS PC AUDIO TABLE OF CONTENTS 1. DESCRIPTION ........................................................................................................................... 7 1.1. Features ........................................................................................................................................... 8 1.2. Block Diagram ................................................................................................................................... 9 2. CHARACTERISTICS/SPECIFICATIONS ................................................................................10 2.1. Electrical Specifications ................................................................................................................... 10 2.1.1. Absolute Maximum Ratings ............................................................................................... 10 2.1.2. Recommended Operation Conditions ............................................................................... 10 2.1.3. Power Consumption ......................................................................................................... 11 2.1.4. AC-Link Static Digital Specifications ................................................................................. 12 2.1.5. STAC9758 5V Analog Performance Characteristics ........................................................12 2.1.6. STAC9759 3.3V Analog Performance Characteristics .....................................................14 2.2. AC Timing Characteristics ............................................................................................................... 17 2.2.1. Cold Reset ......................................................................................................................... 17 2.2.2. Warm Reset ....................................................................................................................... 17 2.2.3. Clocks ................................................................................................................................ 18 2.2.4. STAC9758/9759 Crystal Elimination Circuit and Clock Frequencies ................................19 2.2.5. Data Setup and Hold ........................................................................................................ 20 2.2.6. Signal Rise and Fall Times ................................................................................................ 20 2.2.7. AC-Link Low Power Mode Timing ..................................................................................... 21 2.2.8. ATE Test Mode ..................................................................................................................21 3. TYPICAL CONNECTION DIAGRAM .......................................................................................22 3.1. Split Independent Power Supply Operation .................................................................................... 23 4. CONTROLLER, CODEC AND AC-LINK .................................................................................25 4.1. AC-Link Physical interface ............................................................................................................... 25 4.2. Controller to Single CODEC ............................................................................................................ 25 4.3. Controller to Multiple CODECs ........................................................................................................ 27 4.3.1. Primary CODEC Addressing ............................................................................................. 27 4.3.2. Secondary CODEC Addressing ........................................................................................ 27 4.3.3. CODEC ID Strapping ......................................................................................................... 28 4.4. Clocking for Multiple CODEC Implementations ............................................................................... 28 4.5. STAC9758/9759 as a Primary CODEC ........................................................................................... 28 4.5.1. STAC9758/9759 as a Secondary CODEC ........................................................................ 28 4.6. AC-Link Power Management ........................................................................................................... 29 4.6.1. Powering down the AC-Link .............................................................................................. 29 4.6.2. Waking up the AC-Link ...................................................................................................... 29 4.6.3. CODEC Reset ................................................................................................................... 30 5. AC-LINK DIGITAL INTERFACE ..............................................................................................31 5.1. Overview ......................................................................................................................................... 31 5.2. AC-Link Serial Interface Protocol .................................................................................................... 32 5.2.1. AC-Link Variable Sample Rate Operation ......................................................................... 33 5.2.2. Variable Sample Rate Signaling Protocol .......................................................................... 33 5.2.3. Primary and Secondary CODEC Register Addressing ...................................................... 34 5.3. AC-Link Output Frame (SDATA OUT) ............................................................................................ 35 5.3.1. Slot 0: TAG / CODEC ID ................................................................................................... 36 5.3.2. Slot 1: Command Address Port ......................................................................................... 36 5.3.3. Slot 2: Command Data Port ............................................................................................... 37 5.3.4. Slot 3: PCM Playback Left Channel .................................................................................. 37 5.3.5. Slot 4: PCM Playback Right Channel ................................................................................ 37 5.3.6. Slot 5: Modem Line 1 Output Channel .............................................................................. 37 5.3.7. Slot 6 - 11: DAC ................................................................................................................. 37 5.3.8. Slot 12: Audio GPIO Control Channel ............................................................................... 38 5.4. AC-Link Input Frame (SDATA IN) ................................................................................................. 38 5.4.1. Slot 0: TAG ........................................................................................................................39 IDT 2 STAC9758/9759 V 1.2 1206 HIGH-PERFORMANCE 6-CHANNEL AC97 2.3 CODEC WITH UNIVERSAL JACKS