P0562 Terasic Technologies

1 TR10a-LPQ User Manual www.terasic.com April 16, 2019 CONTENTS Chapter 1 Overview ................................................................................... 4 1.1 General Description............................................................................... 4 1.2 Key Features ......................................................................................... 5 1.3 Block Diagram ....................................................................................... 6 Chapter 2 Board Components ................................................................. 9 2.1 Board Overview ..................................................................................... 9 2.2 Configuration, Status and Setup .......................................................... 10 2.3 General User Input/Output .................................................................. 14 2.4 Temperature Sensor and Fan Control .................................................. 17 2.5 Power Monitor ..................................................................................... 18 2.6 Clock Circuit ........................................................................................ 19 2.7 FLASH Memory ................................................................................... 21 2.8 QDRII+ SRAM ..................................................................................... 24 2.9 QSPF+ Ports ....................................................................................... 35 2.10 PCI Express ...................................................................................... 36 2.11 2x5 Timing Header ............................................................................ 39 Chapter 3 Flash Programming ............................................................... 41 3.1 FPGA Configure Operation .............................................................. 41 3.2 CFI Flash Memory Map .................................................................... 42 3.3 Flash Example Designs .................................................................... 43 3.4 Flash Programming Example .......................................................... 44 3.5 Flash Factory Example .................................................................... 45 3.6 Flash User Example ........................................................................ 47 3.7 Flash Tool Example ......................................................................... 48 3.8 Programming Batch File ................................................................... 48 3.9 Restore Factory Settings .................................................................. 49 Chapter 4 Peripheral Reference Design ................................................ 51 4.1 Configure Si5340A in RTL ................................................................... 51 4.2 Nios II control for SI5340 ..................................................................... 57 Chapter 5 Memory Reference Design .................................................... 60 5.1 QDRII+ SRAM Test ............................................................................. 60 5.2 QDRII+ SRAM Test by Nios II .............................................................. 63 Chapter 6 PCI Express Reference Design ............................................. 67 6.1 PCI Express System Infrastructure ...................................................... 67 6.2 PC PCI Express Software SDK ........................................................... 68 6.3 PCI Express Software Stack ............................................................... 69 6.4 PCIe Design - Fundamental ................................................................ 77 6.5 PCIe Design QDRII+ ........................................................................ 84 6.6 PCIe Design: PCIe Fundamental x2 .................................................. 95 Chapter 7 Transceiver Verification ...................................................... 103 7.1 Function of the Transceiver Test Code .............................................. 103 7.2 Loopback Fixture ............................................................................... 103 7.3 Testing ............................................................................................... 105 Chapter 8 TR10a-LPQ Dashboard ........................................................ 107 2 TR10a-LPQ User Manual www.terasic.com April 16, 2019