74VHC157FT(BJ) Toshiba

74VHC157FT CMOS Digital Integrated Circuits Silicon Monolithic 74VHC157FT74VHC157FT74VHC157FT74VHC157FT 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description Quad 2-Channel Multiplexer 2. 2. 2. 2. GeneralGeneralGeneralGeneral The 74VHC157FT is an advanced high speed CMOS QUAD 2-CHANNEL MULTIPLEXER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. It consists of four 2-input digital multiplexers with common select and strobe inputs. When the ST input is held level, selection of data is inhibited and all the outputs become level. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs. An Input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and on two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. 3. 3. FeaturesFeatures 3. 3. FeaturesFeatures (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature: T = -40 to 125 opr (3) High speed: t = 4.1 ns (typ.) at V = 5 V pd CC (4) Low power dissipation: I = 4.0 A (max) at T = 25 CC a (5) High noise immunity: V = V = 28 % V (min) NIH NIL CC (6) Power down protection is provided on all inputs. (7) Balanced propagation delays: t t PLH PHL (8) Wide operating voltage range: V = 2.0 V to 5.5 V CC(opr) (9) Low noise: V = 0.8 V (max) OLP (10) Pin and function compatible with the 74 serise (AC/HC/AHC/LV etc.) 157 type. Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. 4. 4. 4. 4. PackagingPackagingPackagingPackaging TSSOP16B Start of commercial production 2014-01 2016 Toshiba Corporation 2016-08-18 1 Rev.3.074VHC157FT 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 6. Marking 6. 6. 6. MarkingMarkingMarking 7. 7. 7. 7. IEC Logic SymbolIEC Logic SymbolIEC Logic SymbolIEC Logic Symbol 2016 Toshiba Corporation 2016-08-18 2 Rev.3.0