TC74AC273P(F) Toshiba

TC74AC273P/F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC273P, TC74AC273F, TC74AC273FT Octal D-Type Flip Flop with Clear TC74AC273P The TC74AC273 is an advanced high speed CMOS OCTAL D-TYPE FLIP FLOP fabricated with silicon gate and 2 double-layer metal wiring C MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Information signals applied to D inputs are transferred to the Q output on the positive going edge of the clock pulse. When the CLR input is held L, the Q outputs are at a low TC74AC273F logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features High speed: f = 170 MHz (typ.) at V = 5 V max CC Low power dissipation: I = 8 A (max) at Ta = 25C CC High noise immunity: V = V = 28% V (min) NIH NIL CC TC74AC273FT Symmetrical output impedance: I = I = 24 mA (min) Capability of driving 50 OH OL transmission lines. Balanced propagation delays: t t pLH pHL Wide operating voltage range: V (opr) = 2 V to 5.5 V CC Pin and function compatible with 74F273 Weight DIP20-P-300-2.54A : 1.30 g (typ.) SOP20-P-300-1.27A : 0.22 g (typ.) TSSOP20-P-0044-0.65A : 0.08 g (typ.) Start of commercial production 1988-05 1 2014-03-01 TC74AC273P/F/FT Pin Assignment IEC Logic Symbol (1) CLR R CLR 1 20 V CC (11) CK C1 Q1 2 19 Q8 (3) (2) D1 18 D8 3 D1 1D Q1 (4) (5) D2 Q2 D2 4 17 D7 (7) (6) D3 Q3 (8) (9) D4 Q4 Q2 5 16 Q7 (13) (12) D5 Q5 (14) (15) Q3 6 15 Q6 D6 Q6 (17) (16) D7 Q7 D3 7 14 D6 (18) (19) D8 Q8 D4 8 13 D5 Q4 9 12 Q5 GND 10 11 CK (top view) Truth Table Inputs Output Function CLR D CK Q L X X L Clear H L L H H H H X Q No Change n X: Dont care System Diagram D1 D2 D3 D4 D5 D6 D7 D8 3 4 7 8 13 14 17 18 1 CLR R R R R R R R R D D D D D D D D CK Q CK Q CK Q CK Q CK Q CK Q CK Q CK Q 11 CK 2 5 6 9 12 15 16 19 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 2 2014-03-01