TC74HC123AF(ELNE,F Toshiba

TC74HC123AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC123AP, TC74HC123AF Dual Retriggerable Monostable Multivibrator The TC74HC123A is a high speed CMOS MONOSTABLE 2 TC74HC123AP MULTIVIBRATOR fabricated with silicon gate C MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. There are two trigger inputs, A input (negative edge), and B input (positive edge). These inputs are valid for a slow rise/fall time signal (tr = tf = 1 s) as they are schmitt trigger inputs. This device may also be triggered by using CLR input (positive edge). After triggering, the output stays in a MONOSTABLE state for TC74HC123AF a time period determined by the external resistor and capacitor (Rx, Cx ). A low level at the CLR input breaks this state. In the MONOSTABLE state, if a new trigger is applied, it extends the MONOSTABLE period (retrigger mode). Limits for Cx and Rx are: External capacitor, Cx: No limit External resistor, Rx: V = 2.0 V more than 5 k CC V 3.0 V more than 1 k CC All inputs are equipped with protection circuits against static discharge or transient excess voltage. Weight Features (Note) DIP16-P-300-2.54A : 1.00 g (typ.) SOP16-P-300-1.27A : 0.18 g (typ.) High speed: t = 25 ns (typ.) at V = 5 V pd CC Low power dissipation Standby state: I = 4 A (max) at Ta = 25C CC Active state: I = 700 A (max) at Ta = 25C CC High noise immunity: V = V = 28% V (min) NIH NIL CC Output drive capability: 10 LSTTL loads Symmetrical output impedance: I = I = 4 mA (min) OH OL Balanced propagation delays: t t pLH pHL Wide operating voltage range: V (opr) = 2 to 6 V CC Pin and function compatible with 74LS123 Note: In the case of using only one circuit, CLR should be tied to GND, Rx/CxCxQ Q should be tied to OPEN, the other inputs should be tied to V or GND. CC Start of commercial production 1988-05 1 2016-12-02 TC74HC123AP/AF Pin Assignment IEC Logic Symbol Truth Table Inputs Outputs Note A B CLR Q Q H H Output Enable X L H L H Inhibit H X H L H Inhibit L H Output Enable L H Output Enable X X L L H Inhibit X: Dont care 2 2016-12-02