TC7PCI3412MT,TC7PCI3415MT CMOS Digital Integrated Circuits Silicon Monolithic TC7PCI3412MT,TC7PCI3415MTTC7PCI3412MT,TC7PCI3415MTTC7PCI3412MT,TC7PCI3415MTTC7PCI3412MT,TC7PCI3415MT 1. 1. 1. 1. Functional DescriptionFunctional DescriptionFunctional DescriptionFunctional Description 4 Differential Channel, 2:1 multiplexer/demultiplexer switch for PCI Express Gen3 2. 2. GeneralGeneral 2. 2. GeneralGeneral The TC7PCI3412MT and TC7PCI3415MT are 4 differential channel, 1-2 multiplexer/demultiplexer for PCI Express Gen3 (8Gbps), or other high-speed interface applications. The An+/An- inputs is connected to the Bn+/Bn- or Cn+/Cn- outputs determined by the combination both the select input (SEL) and output enable (OE). When the output enable (OE) input is held high-level, the switches are open (high-impedance state) with regardless the state of select inputs and reducing consumption current. All inputs are equipped with protection circuits against static discharge. 3. 3. 3. 3. FeaturesFeaturesFeaturesFeatures (1) Operating voltage: V = 3.0 to 3.6 V CC (2) Switch terminal ON-capacitance: C = 1.5 pF Switch On (typ.) V = 3.3 V I/O CC (3) ON resistance: R = 7.5 (typ.) V = 3.0 V, V = 0 V ON CC IS (4) -3dB Bandwidth: BW = 10 GHz (typ.) V = 3.3 V CC (5) Insertion Loss: DDIL = -1 dB (typ.) V = 3.3 V, f = 4 GHz CC (6) Off Isolation: DDOIRR = -20 dB (typ.) V = 3.3 V, f = 4 GHz CC (7) Crosstalk: DDNEXT = -40 dB (typ.) V = 3.3 V, f = 4 GHz CC (8) ESD performance: Machine model 200 V, Human body model 2000 V (9) Package: TQFN42 4. 4. PackagingPackaging 4. 4. PackagingPackaging TQFN42 5. 5. 5. 5. MarkingMarkingMarkingMarking TC7PCI3412MT TC7PCI3415MT 2013-08-09 1 Rev.3.0TC7PCI3412MT,TC7PCI3415MT 6. 6. 6. 6. Pin AssignmentPin AssignmentPin AssignmentPin Assignment TC7PCI3412MT TC7PCI3415MT 2013-08-09 2 Rev.3.0