TC7USB3212WBG CMOS Digital Integrated Circuits Silicon Monolithic TC7USB3212WBGTC7USB3212WBGTC7USB3212WBGTC7USB3212WBG 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description Quad SPDT USB Switch 2. 2. 2. 2. GeneralGeneralGeneralGeneral The TC7USB3212WBG is a 2 differential channel, 1-2 multiplexer/demultiplexer for USB3.0 (5Gbps), or other high-speed interface applications. This device consists of four individual multiplexer/demultiplexer with common select input (SEL) and output enable (OE). The An+/An- inputs is connected to the Bn+/Bn- or Cn+/Cn- outputs determined by the combination both the select input (SEL) and output enable (OE). When the output enable (OE) input is held high level, the switches are open with regardless the state of select inputs and a high-impedance state exists between the switches. All inputs are equipped with protection circuits against static discharge. 3. 3. FeaturesFeatures 3. 3. FeaturesFeatures (1) Supply voltage: V = 1.65 to 1.95 V CC (2) ON-resistance: R = 4.5 (typ.) V = 1.65 V, V = 0 V ON CC IS (3) -3dB Bandwidth: BW = 8 GHz (typ.) V = 1.8 V CC (4) Insertion Loss: IL = -1 dB (typ.) V = 1.8 V, f = 2.5 GHz, CC (5) Power-down protection provided on all inputs and outputs. (6) Package: WCSP20 Note: Handling Precaution When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be made of anti-static materials. 4. 4. 4. 4. Packaging and Pin Assignment (Top View)Packaging and Pin Assignment (Top View)Packaging and Pin Assignment (Top View)Packaging and Pin Assignment (Top View) WCSP20 4.1. 4.1. 4.1. 4.1. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 1 2 3 4 5 A A0+ B0+ B0- B1+ B1- B A0- GND GND GND V CC C A1+ GND GND OE SEL D A1- C0+ C0- C1+ C1- Start of commercial production 2014-07 2015 Toshiba Corporation 2015-11-10 1 Rev.2.0TC7USB3212WBG 5. 5. 5. 5. MarkingMarkingMarkingMarking Fig. Fig. 5.15.1 MarkingMarking Fig. Fig. 5.15.1 MarkingMarking 6. 6. 6. 6. System DiagramSystem DiagramSystem DiagramSystem Diagram Fig. Fig. Fig. Fig. 6.16.16.16.1 Block DiagramBlock DiagramBlock DiagramBlock Diagram 7. 7. Principle of OperationPrinciple of Operation 7. 7. Principle of OperationPrinciple of Operation 7.1. 7.1. 7.1. 7.1. Truth TableTruth TableTruth TableTruth Table Input Input Function OE SEL L L An+ port = Bn+ port, An- Port = Bn- Port L H An+ port = Cn+ port, An- Port = Cn- Port H X Disconnect X: Don t Care 2015 Toshiba Corporation 2015-11-10 2 Rev.2.0