TC7WH74FK,LJ(CT Toshiba

TC7WH74FK CMOS Digital Integrated Circuits Silicon Monolithic TC7WH74FKTC7WH74FKTC7WH74FKTC7WH74FK 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description D-Type Flip Flop with Preset and Clear 2. 2. 2. 2. FeaturesFeaturesFeaturesFeatures (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature range: T = -40 to 125 (Note 2) opr (3) High speed operation: f = 170 MHz (typ.) (V = 5.0 V) MAX CC (4) Low power dissipation: I = 2.0 A (max) (T = 25 ) CC a (5) High noise immunity: V = V = 28 % V (min) NIH NIL CC (6) 5.5 V tolerant inputs (7) Balanced propagation delays: t t PLH PHL (8) Wide operating voltage range: V = 2.0 to 5.5 V CC Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. Note 2: For devices with the ordering part number ending in J(CT. T = -40 to 85 for the other devices. opr 3. 3. PackagingPackaging 3. 3. PackagingPackaging US8 Start of commercial production 1994-07 2016 Toshiba Corporation 2017-04-13 1 Rev.3.0TC7WH74FK 4. 4. 4. 4. Marking and Pin AssignmentMarking and Pin AssignmentMarking and Pin AssignmentMarking and Pin Assignment MarkingMarkingMarkingMarking Pin Assignment (Top view)Pin Assignment (Top view)Pin Assignment (Top view)Pin Assignment (Top view) 5. 5. 5. 5. IEC Logic SymbolIEC Logic SymbolIEC Logic SymbolIEC Logic Symbol 6. 6. 6. 6. Truth TableTruth TableTruth TableTruth Table X: Don t care 2016 Toshiba Corporation 2017-04-13 2 Rev.3.0