650V-80mW SiC FET Rev. A, January 2020 DATASHEET Description This SiC FET device is based on a unique cascode circuit UF3C065080B3 configuration, in which a normally-on SiC JFET is co-packaged with a Si MOSFET to produce a normally-off SiC FET device. The devices standard gate-drive characteristics allows for a true drop-in replacement to Si IGBTs, Si FETs, SiC MOSFETs or Si superjunction 2 devices. Available in the D PAK-3L package, this device exhibits ultra- low gate charge and exceptional reverse recovery characteristics, making it ideal for switching inductive loads when used with TAB recommended RC-snubbers, and any application requiring standard D (2) gate drive. TAB Features w Typical on-resistance R of 80mW DS(on),typ w Maximum operating temperature of 175C G (1) w Excellent reverse recovery 2 3 w Low gate charge 1 w Low intrinsic capacitance w ESD protected, HBM class 2 S (3) w Very low switching losses (required RC-snubber loss negligible . under typical operating conditions) Typical applications Part Number Package Marking 2 w EV charging D PAK-3L UF3C065080B3 UF3C065080B3 w PV inverters w Switch mode power supplies w Power factor correction modules w Motor drives w Induction heating Datasheet: UF3C065080B3 Rev. A, January 2020 1Maximum Ratings Parameter Symbol Test Conditions Value Units Drain-source voltage V 650 V DS Gate-source voltage V DC -25 to +25 V GS T = 25C 25 A C 1 I Continuous drain current D T = 100C 18.2 A C 2 T = 25C Pulsed drain current I 65 A C DM 3 L=15mH, I =2.1A E 33 mJ Single pulsed avalanche energy AS AS T = 25C Power dissipation P 115 W C tot Maximum junction temperature T 175 C J,max Operating and storage temperature T , T -55 to 175 C J STG Reflow soldering temperature T reflow MSL 1 260 C solder 1. Limited by T J,max 2. Pulse width t limited by T p J,max 3. Starting T = 25C J Thermal Characteristics Value Parameter Symbol Test Conditions Units Min Typ Max R Thermal resistance, junction-to-case 1 1.3 C/W qJC Datasheet: UF3C065080B3 Rev. A, January 2020 2