DG2032E www.vishay.com Vishay Siliconix 2.5 , High Bandwidth, Dual SPDT Analog Switch DESCRIPTION FEATURES 1.8 V to 5.5 V single supply operation The DG2032E is a low-voltage dual single-pole / double-throw monolithic CMOS analog switch. Designed Low R : 2.5 at 4.5 V ON to operate from 1.8 V to 5.5 V power supply, the DG2032E 221 MHz, -3 dB bandwidth achieves a bandwidth of 221 MHz while providing low Low off-isolation, -58 dB at 1 MHz on-resistance (2.5 ), excellent on-resistance matching +1.6 V logic compatible (0.3 ) and flatness (1 ) over the entire signal range. Material categorization: for definitions of compliance The DG2032E offers the advantage of high linearity that please see www.vishay.com/doc 99912 reduces signal distortion, making ideal for audio, video, and USB signal routing applications. BENEFITS Built on Vishay Siliconixs proprietary sub-micron High linearity high-density process, the DG2032E brings low power Low power consumption consumption at the same time as reduces PCB spacing with High bandwidth the QFN12 package. Full rail signal swing range As a committed partner to the community and the APPLICATIONS environment, Vishay Siliconix manufactures this product with the lead (Pb)-free device terminations. The QFN12 USB / UART signal switching package has a nickel-palladium-gold device termination Audio / video switching and is represented by the lead (Pb)-free -GE4 suffix. The Cellular phone nickel-palladium-gold device terminations meet all JEDEC Media players standards for reflow and MSL ratings. Modems Hard drives PCMCIA FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION IN1 COM1 N/C 12 11 10 TRUTH TABLE LOGIC NC1 AND NC2 NO1 AND NO2 NO1 1 NC1 9 0ON OFF 1OFF ON GND 2 V+ 8 NO2 NC2 3 7 ORDERING INFORMATION TEMP. RANGE PACKAGE PART NUMBER 456 12-Pin QFN IN2 COM2 N/C -40 C to +85 C DG2032EDN-T1-GE4 (3 mm x 3 mm) Top view ABSOLUTE MAXIMUM RATINGS PARAMETER LIMIT UNIT Reference to GND V+ -0.3 to +6 V a IN, COM, NC, NO -0.3 to (V+ + 0.3) Continuous current (any terminal) 50 mA Peak current (pulsed at 1 ms, 10 % duty cycle) 200 Storage temperature (D suffix) -65 to +150 C b c Power dissipation (packages) 12-Pin QFN (3 mm x 3 mm) 1295 mW ESD / HBM EIA / JESD22-A114-A 7.5k V ESD / CDM EIA / JESD22-C101-A 1.5k Latch up JESD78 300 mA Notes a. Signals on NC, NO, or COM or IN exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings b. All leads welded or soldered to PC board c. Derate 4 mW/C above 70 C S17-0462-Rev. A, 27-Mar-17 Document Number: 78604 1 For technical questions, contact: analogswitchtechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 DG2032E www.vishay.com Vishay Siliconix SPECIFICATIONS (V+ = 3 V) LIMITS TEST CONDITIONS TEMP. -40 C to +85 C PARAMETER SYMBOL OTHERWISE UNLESS SPECIFIED UNIT a e c b c V+ = 3 V, 10 %, V = 0.5 V, V = 1.5 V INL INH MIN. TYP. MAX. Analog Switch d Analog signal range V Full 0 - V+ V ANALOG Room - 7 11 V+ = 1.8 V, V = 0.4 V / V+, I = 8 mA NC/NO NC/NO Full - - 13 Drain-source on-resistance R DS(on) Room - 4.6 5.5 V+ = 2.7 V, V = 0.8 V / 1.8 V, I = 10 mA COM COM Full - - 6.5 Room - 0.02 0.3 On-resistance matching R DS(on) Full - - 0.6 V+ = 2.7 V, V = 0.8 V / 1.4 V / 1.8 V, COM I = 10 mA COM Room - 0.62 1 d, f On-resistance flatness R flat(on) Full - - 1.5 Room -1 0.01 1 V+ = 3.6 V, V = 1 V / 3.2 V, NC/NO g Off leakage current I NC/NO(off) V = 3.2 V / 1 V COM Full -5 - 5 nA Room -1 0.01 1 Channel-on leakage I V+ = 3.3 V, V = V = 1 V / 3.2 V g COM(on) COM NC/NO current Full -5 - 5 Digital Control d Input current I or I Full -1 - 1 A INL INH d Input high voltage V Full 1.5 - - INH V d Input low voltage V Full - - 0.4 INL d Digital input capacitance C Room - 3 - pF IN Dynamic Characteristics Room - 19 45 Turn-on time t ON Full - - 50 Room - 9 35 Turn-off time t V = 3 V, C = 35 pF, R = 300 ns OFF NC/NO L L Full - - 45 Room 4 11 - d Break-before-make time t BBM Full 3 - - d Charge injection Q C = 1 nF, V = 1.5 V, R = 0 Room - -9 - pC INJ L gen gen d Bandwidth BW C = 5 pF (set up capacitance) Room - 226 - MHz L f = 1 MHz Room - -55 - d Off-isolation OIRR R = 50 , C = 5 pF L L f = 10 MHz Room - -42 - dB f = 1 MHz Room - -61 - d Channel-to-channel crosstalk X R = 50 , C = 5 pF TALK L L f = 10 MHz Room - -44 - C Room - 7 - NO(off) d NO, NC off capacitance C Room - 7 - NC(off) V+ = 2.7 V, f = 1 MHz pF C Room - 23 - NO(on) d Channel-on capacitance C Room - 23 - NC(on) Power Supply Power supply range V+ 2.7 - 3.3 V d Power supply current I+ V+ = 2.7 V, V = 0 V or 2.7 V Full - - 1 A IN Notes a. Room = 25 C, Full = as determined by the operating suffix b. Typical values are for design aid only, not guaranteed nor subject to production testing c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet d. Guarantee by design, not subjected to production test e. V = input voltage to perform proper function IN f. Difference of min. and max. values g. Guaranteed by 5 V testing S17-0462-Rev. A, 27-Mar-17 Document Number: 78604 2 For technical questions, contact: analogswitchtechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000