DG333A, DG333AL Vishay Siliconix Precision Quad SPDT Analog Switch FEATURES DESCRIPTION 22 V supply voltage range The DG333A, DG333AL consist of four independently TTL and CMOS compatible logic controlled single-pole double-throw analog switches. These Low on-resistance (25 ) monolithic switch is designed to control analog signals with a On-resistance matched between channels (< 2 ) high degree of accuracy. The DG333A, DG333AL minimize Flat on-resistance over analog signal range ( < 3 ) measurement errors by offering low on-resistance (25 typ), Low charge injection (1 pC) low leakage (20 pA typ.) and low charge injection Low leakage (0.2 nA) performance. The DG333AL features micro-power operation Fast switching (175 ns) (< 1 W typ.). This is ideal for battery operated systems. Pin Single-supply operation (5 V to 40 V) 15 is not connected on the DG333A. ESD tolerance > 2 kV per 3015.x Low power (< 1 A) - DG333A, DG333AL An improved charge injection compensation design minimizes switching transients. These switches can handle BENEFITS up to 22 V signals and have an improved continuous Rail-to-rail analog signal range current of 30 mA. Simple logic interface High precision and accuracy The DG333A, DG333AL is fabricated in Vishay Siliconixs Minimal transients proprietary HVSG-2 CMOS process, resulting in higher Low distortion speed and lower power consumption. An epitaxial layer Reduced power consumption prevents latchup. Each switch conducts equally well in both Improved reliability directions when on. When off, they block voltages up to the Break-before-make switching action power-supply levels. APPLICATIONS Audio switching Test equipment Portable instrumentation Communication systems PBX, PABX Computer peripherals Mass storage systems Switched-capacitor networks Battery-powered systems FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION TRUTH TABLE Dual-In-Line and Wide-Body SOIC SW1, 4, 5, 8 SW2, 3, 6, 7 Logic Normally Open Normally Closed IN 1 20 IN 1 4 0 OFF ON S S 2 19 1 8 1ON OFF Logic 0 0.8 V D 3 18 D 1 4 Logic 1 2.4 V S 4 17 S 2 7 ORDERING INFORMATION V- 5 16 V+ a Temp. Range Package Part Number GND 6 15 V (DG333AL Only) L DG333ADJ-E3 20-Pin Plastic DIP S 7 14 S DG333ALDJ-E3 3 6 20-Pin Wide-Body SOIC DG333ADW-E3 D 8 13 D 2 3 (shipped in tubes) DG333ALDW-E3 - 40 C to 85 C S912 S 4 5 20-Pin Wide-Body SOIC DG333ADW-T1-E3 (shipped in tape and reel) DG333ALDW-T1-E3 IN 10 11 IN3 2 DG333ADQ-T1-E3 20-Pin TSSOP Top View (shipped in tape and reel) DG333ALDQ-T1-E3 Note: a. For standard tin/lead external termination, remove the-E3 from the ordering part number. Document Number: 70803 www.vishay.com S11-1762-Rev. D, 05-Sep-11 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000DG333A, DG333AL Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Parameter Limit Unit Voltages Referenced V+ to V- 44 GND 30 V V+ to GND 30 (V-) - 2 to (V+) + 2 a Digital Inputs V , V S D or 30 mA, whichever occurs first Current, Any Terminal 30 mA Peak Current S or D (Pulsed at 1 ms, 10 % Duty Cycle Max.) 100 Storage Temperature - 65 to 125 C c 890 20-Pin Plastic DIP b mW Power Dissipation (Package) d 800 20-Pin Wide SOIC Notes: a. Signals on S , D , or IN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. X X X b. All leads welded or soldered to PC board. c. Derate 12 mW/C above 75 C. d. Derate 10 mW/C above 75 C. SCHEMATIC DIAGRAM (Typical Channel) V+ S 2 V- V+ DG333A S 1 5 V Reg V L (DG333AL) Level V- Shift/ Drive V+ IN X D GND V- Figure 1. www.vishay.com Document Number: 70803 2 S11-1762-Rev. D, 05-Sep-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000