DG9236 Vishay Siliconix Dual SPDT Analog Switch DESCRIPTION FEATURES The DG9236 is a CMOS, dual SPDT analog switch designed Leakage current < 0.5 nA max. at 85 C to operate from V+ = 2.7 V to V+ = 16 V max. operating, Low switch capacitance (C , 2 pF typ.) soff single supply. All control logic inputs have a guaranteed R 101 max. 800 MHz bandwidth DS(on) RoHS 1.8 V logic high threshold when operation from a + 16 V COMPLIANT Fully specified with single supply operation at 16 V power supply. This makes the DG9236 ideally suited to Low voltage, 1.8 V CMOS/TTL compatible interface directly with low voltage micro-processor control Excellent isolation and crosstalk performance (typ. > - 60 dB signals. at 10 MHz) Processed with high density CMOS technology, the DG9236 Fully specified from - 40 C to 85 C while providing ultra low parasitic capacitance of 2 pF for Latch-up current 300 mA per JESD78 CS and 8.4 pF for CD . Other performance features (OFF) (ON) Lead (Pb)-free low profile miniQFN-10 (1.4 mm x 1.8 mm are: 3 dB bandwidth, 800 MHz, - 70 dB crosstalk and 62 dB x 0.55 mm) off isolation at 10 MHz frequency. Compliant to RoHS Directive 2002/95/EC Key applications for the DG9236 are logic level translation, pulse generator, and high speed or low noise signal APPLICATIONS switching in precision instrumentations and portable device High-end data acquisition designs. Medical instruments The operation temperature range is specified from - 40 C to Precision instruments + 85 C. The DG9236 is available in space saving 1.4 mm x High speed communications applications 1.8 mm miniQFN10 package. Automated test equipment As a committed partner to the community and the Sample and hold applications environment, Vishay Siliconix manufactures this product with lead (Pb)-free device termination. The miniQFN-10 package has a nickel-palladium-gold device termination and is represented by the lead (Pb)-free -E4 suffix to the ordering part number. The nickel-palladium-gold device terminations meet all JEDEC standards for reflow and MSL rating. FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION DG9236 miniQFN - 10L S2A S2B 7 6 V+ 8 5 D2 A1 9 4 D1 Logic A0 10 3 S1B 3x 1 2 Pin 1: LONG LEAD GND S1A Pin 1 Device marking: 3x for DG9236 Top View x = Date/Lot Traceability Code TRUTH TABLE Selected Input On Switches A1 A0 DG9236 X 0 D1 to S1A X 1 D1 to S1B 0 X D2 to S2A 1 X D2 to S2B Document Number: 67049 www.vishay.com S11-0598-Rev. B, 25-Apr-11 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000DG9236 Vishay Siliconix ORDERING INFORMATION Temp. Range Package Part Number - 40 C to 85 C 10 pin miniQFN DG9236DN-T1-E4 Notes: - 40 C to 85 C datasheet limits apply. ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Limit Unit V+ to GND 18 V a Digital Inputs , V , V (V+) + 0.3 or 30 mA, whichever occurs first S D Continuous Current (Any Terminal) 30 mA Peak Current, S or D (Pulsed 1 ms, 10 % Duty Cycle) 100 Storage Temperature - 65 to 150 C b c, d Power Dissipation (Package) 10 pin miniQFN 208 mW b Thermal Resistance (Package) 10 pin miniQFN 357 C/W Notes: a. Signals on SX, DX, or AX exceeding V+ or GND will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC board. c. Derate 2.6 mW/C above 70 C. d. Manual soldering with iron is not recommended for leadless components. The miniQFN-10 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper lip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. SPECIFICATIONS (for 16 V Supply) Test Conditions - 40 C to 85 C Unless Otherwise Specified a b c d d Parameter Symbol V+ = 16 V, V = 1.8 V, 0.5 V Temp. Typ. Min. Max. Unit A0, A1 Analog Switch e Analog Signal Range V Full 16 V ANALOG I = 1 mA, Room 101 145 S On-Resistance R DS(on) V = 0.7 V, 2.6 V, 8 V, 11 V, 15.3 V Full 160 D I = 1 mA, Room214 S On-Resistance Match R ON V = 0.7 V, 2.6 V, 8 V, 11 V, 15.3 V Full 15 D I = 1 mA, Room 38 55 S On-Resistance Flatness R FLATNESS V = 0.7 V, 2.6 V, 8 V, 11 V, 15.3 V Full 60 D Room 0.01 - 1 1 I S(off) Full - 2 2 Switch Off V+ = 16 V, Leakage Current V = 1 V/15 V, V = 15 V/1 V D S Room 0.01 - 1 1 I nA D(off) Full - 2 2 Channel On Room 0.01 - 1 1 I V+ = 16 V, V = V 1 V/15 V D(on) D S Leakage Current Full - 2 2 Digital Control Input Current, V Low I V = 0.5 V Full 0.005 - 0.1 0.1 IN IL AX A I V = 1.8 V Full 0.005 - 0.1 0.1 Input Current, V High IH AX IN e Input Capacitance C f = 1 MHz Room 3 pF IN Dynamic Characteristics Room 30 70 Turn-On Time t ON Full 80 R = 300 , C = 35 pF Room 17 55 L L Turn-Off Time t ns OFF see figure 1, 2 Full 65 Room 19 1 Break-Before-Make t BBM Full 25 1 e Charge Injection Q V = 0 V, R = 0 , C = 1 nF Room 6 pC INJ g g L e Off Isolation OIRR R = 50 , C = 5 pF, f = 10 MHz Room - 62 dB L L e Bandwidth BW R = 50 Room 800 MHz L Channel-to-Channel X R = 50 , C = 5 pF, f = 10 MHz Room - 70 dB e TALK L L Crosstalk www.vishay.com Document Number: 67049 2 S11-0598-Rev. B, 25-Apr-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000