LEE-128G032B www.vishay.com Vishay Dale LED Display Modules 128 x 32 Graphics Display with Drive Electronics and + 5 V HC CMOS Level Video Interface Red LED Modules, Normal Brightness, Single Board Construction, RoHS-Compliant FEATURES LED replacement for the popular APD-128G032 plasma display module + 5 V HC CMOS level video interface Large characters Highly visible for long distance viewing > 30:1 contrast ratio Bright red color Slim profile The LEE-128G032B is an LED replacement for the popular Reduced power and brightness version APD-128G032 plasma display module. It is designed to Material categorization: For definitions of compliance offer high brightness and superior viewing characteristics in please see www.vishay.com/doc 99912 a slim package. This display is ideal for low to medium level information content and is ideal for applications such as ELECTRICAL SPECIFICATIONS arcade games, process control, POS terminals, medical Voltage(s) Required: + 5 V (V ) DC CC equipment, message centers and ATM machines. Power Required (Fully Lit): Typ. = 5.5 W, max. = 6.5 W The LEE-128G032B LED display offers high contrast, wide viewing angle, and long distance readability. It emits a bright OPTICAL SPECIFICATIONS red color which catches the attention of the viewer, but is yet Viewing Area: 12.75 323.8 mm W x 3.15 80.01 mm L comfortable to the eye. Character Size (5 x 7): 0.65 16.51 mm H x 0.45 11.43 mm W The LEE-128G032B LED display has a video type interface Pixel Size: 0.063 1.6 mm H x 0.031 0.8 mm W and is driven in a standard row/column refresh method. Pixel Pitch: 0.100 2.54 mm Pixel data is clocked for a row, and rows are scanned Luminance: 100 ft-L minimum sequentially. Signals are presented for serial data, dot clock, Color: Bright red column latch, row data, row clock and display enable. The Viewing Angle: > 150 serial data is entered with the dot clock up to frequencies as high as 8 MHz. After a row of 128 pixels is clocked in, the ENVIRONMENTAL SPECIFICATIONS column latch signal is toggled and the data is latched. At the time the data is latched, the display is briefly disabled using Operating Temperature: - 40 C to + 85 C the display enable signal, then the row pointer is advanced Storage Temperature: - 40 C to + 85 C with the row clock signal. Once each frame the row data Relative Operating Humidity: To 95 % non-condensing must be asserted to synchronize the column serial data with Mechanical Shock: 30 G the beginning row. The recommended scanning frequency Vibration: 3 G is approximately 70 Hz, but may be as high as 200 Hz. Operating Altitude: 10 000 ft STANDARD ELECTRICAL SPECIFICATIONS DIMENSIONS in inches millimeters DESCRIPTION SYMBOL MIN. TYP. MAX. UNITS 12.68 Viewing Area 1.057 0.250 0.150 Mounting Holes (6 x) Logic and LED Max. V + 4.5 + 5.0 + 5.5 V CC DC Drive Voltage Logic and LED Drive Current I -1.1 1.3 A CC DC (Fully Lit) Logic 1 Input V 0.7 V -- V ih CC DC Logic 0 Input V - - 0.3 V V 7.25 7.25 il CC DC 14.80 Note 0.062 Recommended operating voltages, all maximums are absolute maximum Pin 1 of J1 Pin 1 of J2 Revision: 07-Dec-12 Document Number: 37088 1 For technical questions, contact: displays vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 0.889 3.15 Viweing 0.150 Area 4.625 0.150 4.925 0.75 Max. Component Height LEE-128G032B www.vishay.com Vishay Dale PIN DESCRIPTION LOGIC AND DATA TIMING J2 - POWER CONNECTOR t 4 Molex 26-48-1045 or equivalent. Mates with Tyco AMP 3-640428-8, or Molex 09-50-3041 Row Data housing with 08-50-0106 socket crimp terminals or equivalent. t 2 PIN SIGNAL DESCRIPTION t t 1 3 1V Logic and LED drive supply CC Row Clock 2V Logic and LED drive supply CC 0 1230310 1 3 GND Ground 4 GND Ground J1 - DATA CONNECTOR 031 2 03101 FCI 75869-102LF or equivalent. Display Enable Mates with Tyco AMP 1658621-2 or equivalent PIN DESCRIPTION PIN DESCRIPTION 1 Display enable 2 Ground 3 Row data 4 Ground 5 Row clock 6 Ground Row Clock 7 Column latch 8 Ground 9 Dot clock 10 Ground 11 Serial data 12 Ground Column Latch 13 No connection 14 Ground INTERFACE SIGNAL DESCRIPTION Dot clock - This signal enters the serial data on each low to high transition. A total of 128 dot clock transitions must be Display Enable present for each line of column/anode data. Serial data - This signal presents the pixel data in positive st 1 bit of row will appear in left most column logic format. A logic one represents a lit pixel and a logic Serial Data 0 1 2 126 127 zero represents an extinguished pixel. Data is entered from right to left. The first pixel data entered will represent the left t 5 most pixel in the row. Dot Clock Column latch - This signal latches the pixel data into the driver outputs. When the column latch signal goes to logic t Positive edge x 128 t 6 7 one the data entered previously will fall through to the driver outputs. When the signal returns to a logic zero the data is PARAMETER MIN. TYP. MAX. UNITS latched and the shift register is now ready to accept the next t 100 - - ns 1 row of data. Must be held low while entering new serial data. t 5- - s 2 Display enable - This signal enables the output drivers. t 1- - s 3 Using a duty cycle control, this signal may also be used for intensity control. The display enable must be at logic zero t - 70 200 Hz 4 before the column latch signal transitions. To avoid display t 25 - - ns 5 blurring, the row clock signal should also transition while t 75 - - ns 6 display enable is a logic zero. t 75 - - ns 7 Row data - This signal is the first line marker for the scan. This input should be held high to correspond to the first row of pixel data. ORDERING INFORMATION Row clock - This signal clocks row data on the falling edge. DESCRIPTION PART NUMBER The row clock signal is repetitive and must be present for Display, Driver Electronics and proper scanning of the display module. LED-128G032B + 5 V HC CMOS Interface The LEE-128G032B has an unique input protection circuit that assures the column drivers stay blanked on power up. J1 Data Connector Kit 280105-08 (2 pcs. recommended) The protection circuit unblanks the column drivers when the row clock signal begins (i.e the display begins scanning). J2 Power Connector Kit 280108-16 Revision: 07-Dec-12 Document Number: 37088 2 For technical questions, contact: displays vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000