P www.vishay.com Vishay Sfernice High Precision Wraparound - Wide Ohmic Value Range Thin Film Chip Resistors FEATURES Load life stability at 70 C for 2000 h: 0.1 % under Pn/0.05 % under Pd Low temperature coefficient down to 5 ppm/C (- 55 C + 155 C) Very low noise < - 35 dB and voltage coefficient < 0.01 ppm/V Wide resistance range: 10 to 76 M depending on size Tolerances to 0.01 % For low noise and precision applications, superior stability, In lot tracking 5 ppm/C low temperature coefficient of resistance, and low voltage Termination: Thin film technology coefficient, Vishay Sfernices proven precision thin film Gold plated or pre-tinned terminations over nickel barrier wraparound resistors exceed requirements of Short circuits (jumpers) r < 50 mR, I < 2 A, see PZR MIL-PRF-55342G characteristics Y 10 ppm/C (- 55 C datasheet (www.vishay.com/doc 53053) + 155 C) down to 5 ppm/C (- 55 C + 155 C). SMD wraparound terminations Withstand moisture resistance test of AEC-Q200 Compliant to RoHS Directive 2002/95/EC Notes * Pb containing terminations are not RoHS compliant, exemptions may apply ** Please see document Vishay Material Category Policy: www.vishay.com/doc 99902 DIMENSIONS in millimeters (inches) A D D B C E E AB MAX. TOL. MAX. TOL. D/E + 0.152 (+ 0.006) + 0.127 (+ 0.005) CASE SIZE C MIN. TOL. MIN. TOL. - 0.152 (- 0.006) - 0.127 (- 0.005) NOMINAL NOMINAL NOMINAL TOLERANCE 0302 0.75 (0.029) 0.60 (0.024) 0.15 (0.006) 0.08 (0.003) 0402 1.00 (0.039) 0.60 (0.024) 0.25 (0.010) 0.1 (0.004) 0505 1.27 (0.005) 1.27 (0.050) 0603 1.52 (0.060) 0.85 (0.033) 0.38 (0.015) 0.5 (0.02) 0705/0805 1.91 (0.075) 1.27 (0.050) 0.127 (0.005) 1005 2.54 (0.100) 1.27 (0.050) 0.13 (0.005) 1206 3.06 (0.120) 1.60 (0.063) 0.40 (0.016) 1505 3.81 (0.150) 1.32 (0.052) 0.48 (0.019) 2010 5.08 (0.200) 2.54 (0.100) Note Case size 2512 under development. Please consult Vishay Sfernice. Revision: 08-Sep-11 Document Number: 53017 1 For technical questions, contact: sfer vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 P www.vishay.com Vishay Sfernice SUGGESTED LAND PATTERN (to IPC-7351A) G min. X max. Z max. DIMENSIONS (in millimeter) CHIP SIZE Z G X max. min. max. 0302 1.30 0.14 0.73 0402 1.55 0.15 0.73 0505 1.82 0.10 1.40 0603 2.37 0.35 0.98 0705/0805 2.76 0.74 1.40 1005 3.39 1.37 1.40 1206 3.91 1.85 1.73 1505 4.66 2.44 1.45 2010 5.93 3.71 2.67 Note Case size 2512 under development. Please consult Vishay Sfernice. ELECTRICAL SPECIFICATIONS POWER RATING LIMITING ELEMENT VOLTAGE mW (2) CASE SIZE RESISTANCE RANGE V (1) (1) Pn Pd 0302 40 30 25 10 to 750 k 0402 63 40 50 10 to 1.5 M 0505 125 50 50 10 to 4 M 0603 125 100 75 10 to 3.2 M 0705/0805 200 125 150 10 to 10 M 1005 250 125 75 10 to 8.1 M 1206 330 250 200 10 to 35 M 1505 350 175 75 10 to 15 M 2010 1000 500 300 10 to 76 M Notes Case size 2512 under development. Please consult Vishay Sfernice. (1) Pn = Nominal power - Pd = Derated power intended to improve stability. (2) For ohmic range versus tolerance and TCR see detailed table on next page. Revision: 08-Sep-11 Document Number: 53017 2 For technical questions, contact: sfer vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000