6.15 mm6.15 mm SQJ990EP www.vishay.com Vishay Siliconix Automotive Dual N-Channel 100 V (D-S) 175 C MOSFETs FEATURESS PowerPAK SO-8L Dual Asymmetric TrenchFET power MOSFET AEC-Q101 qualified D 1 100 % R and UIS tested g Optimized for synchronous buck applications D 2 Material categorization: 1 for definitions of compliance please see S 1 2 www.vishay.com/doc 99912 G 1 3 S 2 4 11 G 2 D D 1 2 Top View Bottom View PRODUCT SUMMARY N-CHANNEL 1 N-CHANNEL 2 V (V) 100 100 G G DS 1 2 R ( ) at V = 10 V 0.0400 0.0190 DS(on) GS R () at V = 4.5 V 0.0505 0.0235 DS(on) GS I (A) 17 34 D Configuration Dual N S S 1 2 Package PowerPAK SO-8L Dual Asymmetric N-Channel 1 MOSFET N-Channel 2 MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) C PARAMETER SYMBOL N-CHANNEL 1 N-CHANNEL 2 UNIT Drain-Source Voltage V 100 100 DS V Gate-Source Voltage V 20 GS T = 25 C 17 34 C Continuous Drain Current I D T = 125 C 10 19 C a Continuous Source Current (Diode conduction) I 20 44 A S b Pulsed Drain Current I 40 80 DM Single Pulse Avalanche Current I 17 28 AS L = 0.1 mH Single Pulse Avalanche Energy E 14.4 39.2 mJ AS T = 25 C 27 48 C b Maximum Power Dissipation P W D T = 125 C 9 16 C Operating Junction and Storage Temperature Range T , T -55 to +175 J stg C d, e Soldering Recommendations (Peak temperature) 260 THERMAL RESISTANCE RATINGS PARAMETER SYMBOL N-CHANNEL 1 N-CHANNEL 2 UNIT c Junction-to-Ambient PCB mount R 85 85 thJA C/W Junction-to-Case (Drain) R 5.5 3.1 thJC Notes a. Package limited. b. Pulse test pulse width 300 s, duty cycle 2 %. c. When mounted on 1 square PCB (FR4 material). d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8L is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. S16-1496-Rev. A, 25-Jul-16 Document Number: 77789 1 For technical questions, contact: automostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 55.13 mm13 mmSQJ990EP www.vishay.com Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) C PARAMETER SYMBOL TEST CONDITIONS MIN.TYP.MAX.UNIT Static V = 0 V, I = 250 A N-Ch 1 100 - - GS D Drain-Source Breakdown Voltage V DS V = 0 V, I = 250 A N-Ch 2 100 - - GS D V V = V , I = 250 A N-Ch 1 1.5 2.0 2.5 DS GS D Gate-Source Threshold Voltage V GS(th) V = V , I = 250 A N-Ch 2 1.5 2.0 2.5 DS GS D N-Ch 1 - - 100 Gate-Source Leakage I V = 0 V, V = 20 V nA GSS DS GS N-Ch 2 - - 100 V = 0 V V = 100 V N-Ch 1 - - 1 GS DS V = 0 V V = 100 V N-Ch 2 - - 1 GS DS V = 0 V V = 100 V, T = 125 C N-Ch 1 - - 50 GS DS J Zero Gate Voltage Drain Current I A DSS V = 0 V V = 100 V, T = 125 C N-Ch 2 - - 50 GS DS J V = 0 V V = 100 V, T = 175 C N-Ch 1 - - 250 GS DS J V = 0 V V = 100 V, T = 175 C N-Ch 2 - - 250 GS DS J V = 10 V V 5 V N-Ch 1 10 - - GS DS a On-State Drain Current I A D(on) V = 10 V V 5 V N-Ch 2 20 - - GS DS V = 10 V I = 6 A N-Ch 1 - 0.0325 0.0400 GS D V = 10 V I = 10 A N-Ch 2 - 0.0154 0.0190 GS D V = 10 V I = 6 A, T = 125 C N-Ch 1 - - 0.0694 GS D J V = 10 V I = 10 A, T = 125 C N-Ch 2 - - 0.0326 GS D J a Drain-Source On-State Resistance R DS(on) V = 10 V I = 6 A, T = 175 C N-Ch 1 - - 0.0877 GS D J V = 10 V I = 10 A, T = 175 C N-Ch 2 - - 0.0412 GS D J V = 4.5 V I = 4 A N-Ch 1 - 0.0412 0.0505 GS D V = 4.5 V I = 8 A N-Ch 2 - 0.0191 0.0235 GS D V = 10 V, I = 6 A N-Ch 1 - 17 - DS D b Forward Transconductance g S fs V = 10 V, I = 10 A N-Ch 2 - 34 - DS D b Dynamic V = 0 V V = 25 V, f = 1 MHz N-Ch 1 - 475 650 GS DS Input Capacitance C iss V = 0 V V = 25 V, f = 1 MHz N-Ch 2 - 1065 1390 GS DS V = 0 V V = 25 V, f = 1 MHz N-Ch 1 - 280 375 GS DS Output Capacitance C pF oss V = 0 V V = 25 V, f = 1 MHz N-Ch 2 - 560 750 GS DS V = 0 V V = 25 V, f = 1 MHz N-Ch 1 - 18 25 GS DS Reverse Transfer Capacitance C rss V = 0 V V = 25 V, f = 1 MHz N-Ch 2 - 37 50 GS DS V = 10 V V = 50 V, I = 1 A N-Ch 1 - 10 15 GS DS D c Total Gate Charge Q g V = 10 V V = 50 V, I = 1 A N-Ch 2 - 20 30 GS DS D V = 10 V V = 50 V, I = 1 A N-Ch 1 - 2 - GS DS D nC c Gate-Source Charge Q gs V = 10 V V = 50 V, I = 1 A N-Ch 2 - 3 - GS DS D V = 10 V V = 50 V, I = 1 A N-Ch 1 - 3 - GS DS D c Gate-Drain Charge Q gd V = 10 V V = 50 V, I = 60 A N-Ch 2 - 5 - GS DS D N-Ch 1 1.2 2.5 3.8 Gate Resistance R f = 1 MHz g N-Ch 2 0.6 1.4 2.2 S16-1496-Rev. A, 25-Jul-16 Document Number: 77789 2 For technical questions, contact: automostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000