VS-ST700CL Series www.vishay.com Vishay Semiconductors Phase Control Thyristors (Hockey PUK Version), 910 A FEATURES Center amplifying gate Metal case with ceramic insulator International standard case B-PUK (TO-200AC) Designed and qualified for industrial level Material categorization: for definitions of compliance please see www.vishay.com/doc 99912 TYPICAL APPLICATIONS DC motor controls B-PUK (TO-200AC) Controlled DC power supplies AC controllers PRIMARY CHARACTERISTICS I 910 A T(AV) V /V 1200 V, 1600 V, 1800 V, 2000 V DRM RRM V 1.80 V TM I 100 mA GT T -40 C to +125 C J Package B-PUK (TO-200AC) Circuit configuration Single SCR MAJOR RATINGS AND CHARACTERISTICS PARAMETER TEST CONDITIONS VALUES UNITS 910 A I T(AV) T 55 C hs 1857 A I T(RMS) T 25 C hs 50 Hz 15 700 I A TSM 60 Hz 16 400 50 Hz 1232 2 2 I t kA s 60 Hz 1125 V /V 1200 to 2000 V DRM RRM t Typical 150 s q T -40 to 125 C J VOLTAGE RATINGS V /V , MAXIMUM REPETITIVE V , MAXIMUM I /I MAXIMUM AT DRM RRM RSM DRM RRM TYPE VOLTAGE PEAK AND OFF-STATE VOLTAGE NON-REPETITIVE PEAK VOLTAGE T = T MAXIMUM J J NUMBER CODE V V mA 12 1200 1300 16 1600 1700 VS-ST700CL 80 18 1800 1900 20 2000 2100 Revision: 27-Sep-17 Document Number: 94413 1 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000VS-ST700CL Series www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS 910 (355) A Maximum average on-state current 180 conduction, half sine wave I T(AV) at heatsink temperature double side (single side) cooled 55 (85) C Maximum RMS on-state current I DC at 25 C heatsink temperature double side cooled 1857 T(RMS) t = 10 ms 15 700 No voltage reapplied t = 8.3 ms 16 400 A Maximum peak, one-cycle I TSM non-repetitive surge current t = 10 ms 13 200 100 % V RRM reapplied t = 8.3 ms 13 800 Sinusoidal half wave, initial T = T maximum J J t = 10 ms 1232 No voltage reapplied t = 8.3 ms 1125 2 2 2 Maximum I t for fusing I t kA s t = 10 ms 871 100 % V RRM reapplied t = 8.3 ms 795 2 2 2 Maximum I t for fusing I t t = 0.1 to 10 ms, no voltage reapplied 12 321 kA s Low level value of threshold voltage V (16.7 % x x I < I < x I ), T = T maximum 1.00 T(TO)1 T(AV) T(AV) J J V High level value of threshold voltage V (I > x I ), T = T maximum 1.13 T(TO)2 T(AV) J J Low level value of on-state slope resistance r (16.7 % x x I < I < x I ), T = T maximum 0.40 t1 T(AV) T(AV) J J m High level value of on-state slope resistance r (I > x I ), T = T maximum 0.35 t2 T(AV) J J Maximum on-state voltage V I = 2000 A, T = T maximum, t = 10 ms sine pulse 1.80 V TM pk J J p Maximum holding current I 600 H T = 25 C, anode supply 12 V resistive load mA J Typical latching current I 1000 L SWITCHING PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS Maximum non-repetitive rate of rise Gate drive 20 V, 20 , t 1 s r dI/dt 1000 A/s of turned-on current T = T maximum, anode voltage 80 % V J J DRM Gate current 1 A, dI /dt = 1 A/s g Typical delay time t 1.0 d V = 0.67 % V , T = 25 C d DRM J s I = 750 A, T = T maximum, dI/dt = 60 A/s, TM J J Typical turn-off time t 150 q V = 50 V, dV/dt = 20 V/s, gate 0 V 100 , t = 500 s R p BLOCKING PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS Maximum critical rate of rise of dV/dt T = T maximum linear to 80 % rated V 500 V/s J J DRM off-state voltage Maximum peak reverse and I , RRM T = T maximum, rated V /V applied 80 mA J J DRM RRM off-state leakage current I DRM Revision: 27-Sep-17 Document Number: 94413 2 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000