VS1003 VLSI VS1003b y Solution VS1003 - MP3/WMA AUDIO CODEC Features Description Decodes MPEG 1 & 2 audio layer III (CBR VS1003 is a single-chip MP3/WMA/MIDI audio +VBR +ABR) WMA 4.0/4.1/7/8/9 all pro- decoder and ADPCM encoder. It contains a high- les (5-384kbit/s) WAV (PCM + IMA AD- performance, proprietary low-power DSP proces- 4 PCM) General MIDI / SP-MIDI les sor core VS DSP , working data memory, 5 KiB Encodes IMA ADPCM from microphone instruction RAM and 0.5 KiB data RAM for user or line input applications, serial control and input data inter- Streaming support for MP3 and WAV faces, 4 general purpose I/O pins, an UART, as Bass and treble controls well as a high-quality variable-sample-rate mono Operates with a single 12..13 MHz clock ADC and stereo DAC, followed by an earphone Internal PLL clock multiplier amplier and a common buffer. Low-power operation High-quality on-chip stereo DAC with no VS1003 receives its input bitstream through a se- phase error between channels rial input bus, which it listens to as a system slave. Stereo earphone driver capable of driving a The input stream is decoded and passed through a 30 load digital volume control to an 18-bit oversampling, Separate operating voltages for analog, dig- multi-bit, sigma-delta DAC. The decoding is con- ital and I/O trolled via a serial control bus. In addition to the 5.5 KiB On-chip RAM for user code / data basic decoding, it is possible to add application Serial control and data interfaces specic features, like DSP effects, to the user RAM Can be used as a slave co-processor memory. SPI ash boot for special applications UART for debugging purposes New functions may be added with software and 4 GPIO pins audio mic VS1003 L audio Mono Stereo Stereo Ear MIC AMP MUX R ADC DAC phone Driver line output audio 4 GPIO GPIO X ROM DREQ SO SI Serial X RAM Data/ 4 SCLK Control VSDSP Interface XCS XDCS Y ROM RX UART TX Y RAM Clock multiplier Instruction Instruction RAM ROM Version 1.04, 2009-02-03 1VS1003 VLSI VS1003b y Solution CONTENTS Contents 1 Licenses 9 2 Disclaimer 9 3 Denitions 9 4 Characteristics & Specications 10 4.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 Analog Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.4 Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.5 Digital Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.6 Switching Characteristics - Boot Initialization . . . . . . . . . . . . . . . . . . . . . . . 12 4.7 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.7.1 Line input ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.7.2 Microphone input ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.7.3 RIGHT and LEFT outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 Packages and Pin Descriptions 15 5.1 Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1.1 LQFP-48 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1.2 BGA-49 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2 LQFP-48 and BGA-49 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 Connection Diagram, LQFP-48 18 Version 1.04, 2009-02-03 2