W25X40CLSVIG Winbond

W25X40CL 2.5/3/3.3 V 4M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI Publication Release Date: March 25, 2014 - 1 - Revision F W25X40CL Table of Contents 1. GENERAL DESCRIPTION ......................................................................................................... 4 2. FEATURES ................................................................................................................................. 4 3. PIN CONFIGURATION SOIC 208-MIL, SOIC 150-MIL AND VSOP 150-MIL ............................ 5 4. PAD CONFIGURATION WSON 6X5-MM AND USON 2X3-MM ................................................ 5 5. PIN CONFIGURATION PDIP 300-MIL ....................................................................................... 6 6. PIN DESCRIPTION SOIC, VSOP, WSON, USON AND PDIP ................................................... 6 6.1 Package Types ............................................................................................................... 7 6.2 Chip Select (/CS) ............................................................................................................ 7 6.3 Serial Data Input, Output and IOs (DI, DO, IO0 and IO1) .............................................. 7 6.4 Write Protect (/WP) ......................................................................................................... 7 6.5 HOLD (/HOLD) ................................................................................................................ 7 6.6 Serial Clock (CLK) .......................................................................................................... 7 7. BLOCK DIAGRAM ...................................................................................................................... 8 7.1 SPI OPERATIONS.......................................................................................................... 9 7.1.1 Standard SPI Instructions ................................................................................................. 9 7.1.2 Dual SPI Instructions ........................................................................................................ 9 7.1.3 Hold Function ................................................................................................................... 9 7.2 WRITE PROTECTION .................................................................................................. 10 7.2.1 Write Protect Features .................................................................................................... 10 8. CONTROL AND STATUS REGISTERS ................................................................................... 11 8.1 STATUS REGISTER .................................................................................................... 11 8.1.1 BUSY .............................................................................................................................. 11 8.1.2 Write Enable Latch (WEL) .............................................................................................. 11 8.1.3 Block Protect Bits (BP2, BP1, BP0) ................................................................................ 11 8.1.4 Top/Bottom Block Protect (TB) ....................................................................................... 11 8.1.5 Reserved Bits ................................................................................................................. 12 8.1.6 Status Register Protect (SRP) ........................................................................................ 12 8.1.7 Status Register Memory Protection ................................................................................ 13 8.2 INSTRUCTIONS ........................................................................................................... 14 8.2.1 Manufacturer and Device Identification .......................................................................... 14 (1) 8.2.2 Instruction Set ............................................................................................................. 15 8.2.3 Write Enable (06h) .......................................................................................................... 16 8.2.4 Write Enable for Volatile Status Register (50h) .............................................................. 16 8.2.5 Write Disable (04h) ......................................................................................................... 17 8.2.6 Read Status Register (05h) ............................................................................................ 17 8.2.7 Write Status Register (01h) ............................................................................................ 18 8.2.8 Read Data (03h) ............................................................................................................. 19 8.2.9 Fast Read (0Bh) ............................................................................................................. 20 8.2.10 Fast Read Dual Output (3Bh) ....................................................................................... 21 8.2.11 Fast Read Dual I/O (BBh) ............................................................................................. 22 8.2.12 Continuous Read Mode Bits (M7-0) ............................................................................. 24 8.2.13 Continuous Read Mode Reset (FFFFh) ....................................................................... 24 8.2.14 Page Program (02h) ..................................................................................................... 25 8.2.15 Sector Erase (20h) ....................................................................................................... 26 Publication Release Date: March 25, 2014 - 2 - Revision F