iEthernet W5200 iEthernet W5200 Datasheet Version 1.3.0 iEthernet W5200 W5200 The W5200 chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier internet connection for embedded systems using SPI (Serial Peripheral Interface). W5200 suits best for users who need Internet connectivity for application that uses a single chip to implement TCP/IP Stack, 10/100 Ethernet MAC and PHY. The W5200 is composed of a fully hardwired market-proven TCP/IP stack and an integrated Ethernet MAC & PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP, and PPPoE, which has been proven in various applications for many years. W5200 uses a 32Kbytes internal buffer as its data communication memory. By using W5200, users can implement the Ethernet application they need by using a simple socket program instead of handling a complex Ethernet Controller. SPI (Serial Peripheral Interface) is provided for easy integration with the external MCU. Using the only 4 pins of SPI to connect with MCU, it is possible to design for small form factor system with the MCUs I/O pin limit. In order to reduce power consumption of the system, W5200 provides WOL (Wake on LAN) and power down mode. To wake up during WOL, W5200 should be received magic packet, which is the Raw Ethernet packet. Features - Support Hardwired TCP/IP Protocols : TCP, UDP, ICMP, IPv4 ARP, IGMP, PPPoE, Ethernet - Supports 8 independent sockets simultaneously - Very small 48 Pin QFN Package - Support Power down mode - Support Wake on LAN - Support High Speed Serial Peripheral Interface(SPI MODE 0, 3) - Internal 32Kbytes Memory for Tx/Rx Buffers - 10BaseT/100BaseTX Ethernet PHY embedded - Support Auto Negotiation (Full and half duplex, 10 and 100-based ) - Support Auto MDI/MDIX - Support ADSL connection (with support PPPoE Protocol with PAP/CHAP Authentication mode) - Not support IP Fragmentation - 3.3V operation with 5V I/O signal tolerance - Lead-Free Package - Multi-function LED outputs (Full/Half duplex, Link, Speed) Copyright 2013 WIZnet Co.,Ltd. All rights reserved. 2