W7100-S2E-100 WIZnet

W7100A Datasheet Version 1.2.4 2013~2014 WIZnet Co.,Ltd. All Rights Reserved. For more information, visit our website at U Table of Contents 1 Overview ....................................................................................... 11 1.1 Introduction ................................................................................... 11 1.2 W7100A Features ............................................................................. 11 1.3 W7100A Block Diagram & Features ........................................................ 12 1.3.1 ALU (Arithmetic Logic Unit) ........................................................ 12 1.3.2 TCPIPCore ............................................................................. 14 1.4 Pin Description ................................................................................ 16 1.4.1 Pin Layout ............................................................................. 16 1.4.2 Pin Description ........................................................................ 17 1.4.2.1 Configuration .................................................................... 18 1.4.2.2 Timer ............................................................................. 19 1.4.2.3 UART .............................................................................. 19 1.4.2.4 DoCD Compatible Debugger ................................................ 19 1.4.2.5 Interrupt / Clock ............................................................... 19 1.4.2.6 GPIO .............................................................................. 20 1.4.2.7 Media Interface ................................................................. 21 1.4.2.8 Network Indicator LED ......................................................... 22 1.4.2.9 Power Supply Signal ............................................................ 22 1.5 64pin package description .................................................................. 24 1.5.1 Difference between 100 and 64pin package .................................... 24 2 Memory ........................................................................................ 26 2.1 Code Memory ................................................................................. 27 2.1.1 Code Memory Wait States ........................................................... 29 2.2 Data Memory .................................................................................. 29 2.2.1 Data Memory Wait States ........................................................... 30 2.3 External Data Memory Access .............................................................. 30 2.3.1 Standard 8051 Interface ............................................................ 30 2.3.2 Direct Interface....................................................................... 32 2.4 Internal Data Memory and SFR ............................................................. 33 2.5 SFR definition ................................................................................. 34 2.5.1 Program Code Memory Write Enable Bit ......................................... 34 2.5.2 Program Code Memory Wait States Register ..................................... 34 2.5.3 Data Pointer Extended Registers .................................................. 36 2.5.4 Data Pointer Registers ............................................................... 36 2.5.5 Clock Control Register ............................................................... 37 W7100A Datasheet v1.2.4 2